ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines

[oweals/u-boot.git] / include / ppc4xx_enet.h

diff --git a/include/ppc4xx_enet.h b/include/ppc4xx_enet.h
index 89ff26f991254b4863d4905ecf48524ccaa9e644..b74c6fcafde7255fac2f8cfa9d1169bd0637283a 100644 (file)
--- a/include/ppc4xx_enet.h
+++ b/include/ppc4xx_enet.h
@@ -153,6 +153,20 @@ typedef struct emac_4xx_hw_st {
 #define SDR0_PFC1_EM_1000      (0x00200000)
 #endif
 
+/*
+ * XMII bridge configurations for those systems (e.g. 405EX(r)) that do
+ * not have a pin function control (PFC) register to otherwise determine
+ * the bridge configuration.
+ */
+#define EMAC_PHY_MODE_NONE             0
+#define EMAC_PHY_MODE_NONE_RGMII       1
+#define EMAC_PHY_MODE_RGMII_NONE       2
+#define EMAC_PHY_MODE_RGMII_RGMII      3
+#define EMAC_PHY_MODE_NONE_GMII                4
+#define EMAC_PHY_MODE_GMII_NONE                5
+#define EMAC_PHY_MODE_NONE_MII         6
+#define EMAC_PHY_MODE_MII_NONE         7
+
 /* ZMII Bridge Register addresses */
 #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
     defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
@@ -218,12 +232,12 @@ typedef struct emac_4xx_hw_st {
 #endif
 
 /* RGMII Function Enable (FER) Register Bit Definitions */
-/* Note: for EMAC 2 and 3 only, 440GX only */
 #define RGMII_FER_DIS          (0x00)
 #define RGMII_FER_RTBI         (0x04)
 #define RGMII_FER_RGMII                (0x05)
 #define RGMII_FER_TBI          (0x06)
 #define RGMII_FER_GMII         (0x07)
+#define RGMII_FER_MII          (RGMII_FER_GMII)
 
 #define RGMII_FER_V(__x)       ((__x - 2) * 4)
 
@@ -318,9 +332,9 @@ typedef struct emac_4xx_hw_st {
 #endif
 #else
 #if defined(CONFIG_405EZ) || defined(CONFIG_405EX)
-#define EMAC_BASE              0xEF600900
+#define EMAC_BASE              0xEF600900
 #else
-#define EMAC_BASE              0xEF600800
+#define EMAC_BASE              0xEF600800
 #endif
 #endif