ppx4xx: Fix sdram init on PMC440 boards

[oweals/u-boot.git] / include / ppc405.h

diff --git a/include/ppc405.h b/include/ppc405.h
index 97528e88a829a5a91a566fda9d340bc7f0d22e11..b5ad38fc527a9ec79c33069c90ee6741d3db06a7 100644 (file)
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -22,6 +22,12 @@
 #ifndef        __PPC405_H__
 #define __PPC405_H__
 
+#ifndef CONFIG_IOP480
+#define CFG_DCACHE_SIZE                (16 << 10)      /* For AMCC 405 CPUs    */
+#else
+#define CFG_DCACHE_SIZE                (2 << 10)       /* For PLX IOP480 (403) */
+#endif
+
 /*--------------------------------------------------------------------- */
 /* Special Purpose Registers                                           */
 /*--------------------------------------------------------------------- */
@@ -1129,6 +1135,8 @@
 
 #endif /* CONFIG_405EZ */
 
+#define GPIO0_BASE             GPIO_BASE
+
 #if defined(CONFIG_405EX)
 #define SDR0_SRST              0x0200
 
@@ -1566,6 +1574,19 @@
 #define   SDR0_CUST0_CHIPSELGAT_EN1   0x00000004       /* Chip Select1 Gating Enable */
 #define   SDR0_CUST0_CHIPSELGAT_EN2   0x00000002       /* Chip Select2 Gating Enable */
 #define   SDR0_CUST0_CHIPSELGAT_EN3   0x00000001       /* Chip Select3 Gating Enable */
+
+#define SDR0_PFC0              0x4100
+#define SDR0_PFC1              0x4101
+#define SDR0_PFC1_U1ME         0x02000000
+#define SDR0_PFC1_U0ME         0x00080000
+#define SDR0_PFC1_U0IM         0x00040000
+#define SDR0_PFC1_SIS          0x00020000
+#define SDR0_PFC1_DMAAEN       0x00010000
+#define SDR0_PFC1_DMADEN       0x00008000
+#define SDR0_PFC1_USBEN                0x00004000
+#define SDR0_PFC1_AHBSWAP      0x00000020
+#define SDR0_PFC1_USBBIGEN     0x00000010
+#define SDR0_PFC1_GPT_FREQ     0x0000000f
 #endif
 
 #endif /* __PPC405_H__ */