RK808_NUM_OF_REGS,
};
+enum {
+ RK817_REG_SYS_CFG3 = 0xf4,
+};
+
enum {
RK816_REG_DCDC_EN1 = 0x23,
RK816_REG_DCDC_EN2,
RK805_ID = 0x8050,
RK808_ID = 0x0000,
RK816_ID = 0x8160,
+ RK817_ID = 0x8170,
RK818_ID = 0x8180,
};
+enum {
+ RK817_POWER_EN0 = 0xb1,
+ RK817_POWER_EN1,
+ RK817_POWER_EN2,
+ RK817_POWER_EN3,
+};
+
+#define RK817_POWER_EN_SAVE0 0x99
+#define RK817_POWER_EN_SAVE1 0xa4
+
+#define RK817_ID_MSB 0xed
+#define RK817_ID_LSB 0xee
#define RK8XX_ID_MSK 0xfff0
+#define RK817_PMIC_SYS_CFG3 0xf4
+#define RK817_GPIO_INT_CFG 0xfe
+
+#define RK8XX_ON_SOURCE 0xae
+#define RK8XX_OFF_SOURCE 0xaf
+#define RK817_BUCK4_CMIN 0xc6
+#define RK817_ON_SOURCE 0xf5
+#define RK817_OFF_SOURCE 0xf6
+
+struct reg_data {
+ u8 reg;
+ u8 val;
+ u8 mask;
+};
struct rk8xx_reg_table {
char *name;
u8 reg_ctl;