mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDS

[oweals/u-boot.git] / include / mpc83xx.h

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 1b62f8129383f058ce79a9c29a4d16c344995230..73f2721619379caeef7d46d3abd533d560426810 100644 (file)
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -68,6 +68,15 @@
 #define SPR_8343E_REV11                        0x80360101
 #define SPR_8343_REV11                 0x80370101
 
+#define SPR_8349E_REV31                        0x80300300
+#define SPR_8349_REV31                 0x80310300
+#define SPR_8347E_REV31_TBGA           0x80320300
+#define SPR_8347_REV31_TBGA            0x80330300
+#define SPR_8347E_REV31_PBGA           0x80340300
+#define SPR_8347_REV31_PBGA            0x80350300
+#define SPR_8343E_REV31                        0x80360300
+#define SPR_8343_REV31                 0x80370300
+
 #define SPR_8360E_REV10                        0x80480010
 #define SPR_8360_REV10                 0x80490010
 #define SPR_8360E_REV11                        0x80480011
@@ -573,8 +582,8 @@
 
 /* TIMING_CFG_2 - DDR SDRAM Timing Configuration 2
  */
-#define TIMING_CFG2_CPO                        0x0F000000
-#define TIMING_CFG2_CPO_SHIFT          24
+#define TIMING_CFG2_CPO                        0x0F800000
+#define TIMING_CFG2_CPO_SHIFT          23
 #define TIMING_CFG2_ACSM               0x00080000
 #define TIMING_CFG2_WR_DATA_DELAY      0x00001C00
 #define TIMING_CFG2_WR_DATA_DELAY_SHIFT        10