+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2009-2012, 2013 Freescale Semiconductor, Inc.
* Jun-jie Zhang <b18070@freescale.com>
* Mingkai Hu <Mingkai.hu@freescale.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
+
#ifndef __FSL_PHY_H__
#define __FSL_PHY_H__
#include <net.h>
#include <miiphy.h>
-#include <asm/fsl_enet.h>
+
+struct tsec_mii_mng {
+ u32 miimcfg; /* MII management configuration reg */
+ u32 miimcom; /* MII management command reg */
+ u32 miimadd; /* MII management address reg */
+ u32 miimcon; /* MII management control reg */
+ u32 miimstat; /* MII management status reg */
+ u32 miimind; /* MII management indication reg */
+ u32 ifstat; /* Interface Status Register */
+};
+
+int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc);
/* PHY register offsets */
#define PHY_EXT_PAGE_ACCESS 0x1f
/* MII Management Configuration Register */
-#define MIIMCFG_RESET_MGMT 0x80000000
-#define MIIMCFG_MGMT_CLOCK_SELECT 0x00000007
-#define MIIMCFG_INIT_VALUE 0x00000003
+#define MIIMCFG_RESET_MGMT 0x80000000
+#define MIIMCFG_MGMT_CLOCK_SELECT 0x00000007
+#define MIIMCFG_INIT_VALUE 0x00000003
/* MII Management Command Register */
#define MIIMCOM_READ_CYCLE 0x00000001