microblaze: Remove CONSOLE_ARG

[oweals/u-boot.git] / include / fsl_ddr_sdram.h

diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
index e5b6e03c8fd7a569d07045270f32adef4528e0f1..9ea8b6377906e37caea047f65703fd2aba021b5c 100644 (file)
--- a/include/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -1,9 +1,7 @@
 /*
  * Copyright 2008-2014 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * SPDX-License-Identifier:    GPL-2.0
  */
 
 #ifndef FSL_DDR_MEMCTL_H
@@ -33,6 +31,15 @@
 #define DDR3_RTT_20_OHM                4 /* RTT_Nom = RZQ/12 */
 #define DDR3_RTT_30_OHM                5 /* RTT_Nom = RZQ/8 */
 
+#define DDR4_RTT_OFF           0
+#define DDR4_RTT_60_OHM                1       /* RZQ/4 */
+#define DDR4_RTT_120_OHM       2       /* RZQ/2 */
+#define DDR4_RTT_40_OHM                3       /* RZQ/6 */
+#define DDR4_RTT_240_OHM       4       /* RZQ/1 */
+#define DDR4_RTT_48_OHM                5       /* RZQ/5 */
+#define DDR4_RTT_80_OHM                6       /* RZQ/3 */
+#define DDR4_RTT_34_OHM                7       /* RZQ/7 */
+
 #define DDR2_RTT_OFF           0
 #define DDR2_RTT_75_OHM                1
 #define DDR2_RTT_150_OHM       2
@@ -324,6 +331,8 @@ typedef struct memctl_options_s {
        unsigned int dqs_config;        /* Use DQS? maybe only with DDR2? */
        /* SREN - self-refresh during sleep */
        unsigned int self_refresh_in_sleep;
+       /* SR_IE - Self-refresh interrupt enable */
+       unsigned int self_refresh_interrupt_en;
        unsigned int dynamic_power;     /* DYN_PWR */
        /* memory data width to use (16-bit, 32-bit, 64-bit) */
        unsigned int data_bus_width;