ppc: xilinx-ppc405: Remove support for fx12mm

[oweals/u-boot.git] / include / fdtdec.h

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 7a1450c5762f7ff06584a4604c707b4462b8da06..dd82916dc00ae711748f428acac754754102c698 100644 (file)
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -151,7 +151,6 @@ enum fdt_compat_id {
        COMPAT_GENERIC_SPI_FLASH,       /* Generic SPI Flash chip */
        COMPAT_MAXIM_98095_CODEC,       /* MAX98095 Codec */
        COMPAT_SAMSUNG_EXYNOS5_I2C,     /* Exynos5 High Speed I2C Controller */
-       COMPAT_SANDBOX_LCD_SDL,         /* Sandbox LCD emulation with SDL */
        COMPAT_SAMSUNG_EXYNOS_SYSMMU,   /* Exynos sysmmu */
        COMPAT_INTEL_MICROCODE,         /* Intel microcode update */
        COMPAT_MEMORY_SPD,              /* Memory SPD information */
@@ -164,12 +163,12 @@ enum fdt_compat_id {
        COMPAT_INTEL_X86_PINCTRL,       /* Intel ICH7/9 pin control */
        COMPAT_SOCIONEXT_XHCI,          /* Socionext UniPhier xHCI */
        COMPAT_INTEL_PCH,               /* Intel PCH */
-       COMPAT_INTEL_IRQ_ROUTER,        /* Intel Interrupt Router */
        COMPAT_ALTERA_SOCFPGA_DWMAC,    /* SoCFPGA Ethernet controller */
        COMPAT_ALTERA_SOCFPGA_DWMMC,    /* SoCFPGA DWMMC controller */
        COMPAT_ALTERA_SOCFPGA_DWC2USB,  /* SoCFPGA DWC2 USB controller */
        COMPAT_INTEL_BAYTRAIL_FSP,      /* Intel Bay Trail FSP */
        COMPAT_INTEL_BAYTRAIL_FSP_MDP,  /* Intel FSP memory-down params */
+       COMPAT_INTEL_IVYBRIDGE_FSP,     /* Intel Ivy Bridge FSP */
 
        COMPAT_COUNT,
 };