Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[oweals/u-boot.git] / include / dt-bindings / memory / stm32-sdram.h

diff --git a/include/dt-bindings/memory/stm32-sdram.h b/include/dt-bindings/memory/stm32-sdram.h
index 4cd6c2b77cb4f447006d4372c4761d373b94c9ed..ab91d2b7f630acb2d933a9b6c1cedffcaea498a6 100644 (file)
--- a/include/dt-bindings/memory/stm32-sdram.h
+++ b/include/dt-bindings/memory/stm32-sdram.h
@@ -18,17 +18,29 @@
 #define CAS_1          0x1
 #define CAS_2          0x2
 #define CAS_3          0x3
+#define SDCLK_DIS      0x0
+#define SDCLK_2                0x2
+#define SDCLK_3                0x3
 #define RD_BURST_EN    0x1
 #define RD_BURST_DIS   0x0
 #define RD_PIPE_DL_0   0x0
 #define RD_PIPE_DL_1   0x1
 #define RD_PIPE_DL_2   0x2
 
-#define TMRD_1         0x1
-#define TXSR_60                60
-#define TRAS_42                42
-#define TRC_60         60
-#define TRP_18         18
-#define TRCD_18                18
+/* Timing = value +1 cycles */
+#define TMRD_1         (1 - 1)
+#define TMRD_2         (2 - 1)
+#define TMRD_3         (3 - 1)
+#define TXSR_1         (1 - 1)
+#define TXSR_6         (6 - 1)
+#define TXSR_7         (7 - 1)
+#define TRAS_1         (1 - 1)
+#define TRAS_4         (4 - 1)
+#define TRC_6          (6 - 1)
+#define TWR_1          (1 - 1)
+#define TWR_2          (2 - 1)
+#define TRP_2          (2 - 1)
+#define TRCD_1         (1 - 1)
+#define TRCD_2         (2 - 1)
 
 #endif