/*
+ * (C) Copyright 2005-2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*/
/************************************************************************
- * yosemite.h - configuration for YOSEMITE board
+ * yosemite.h - configuration for Yosemite & Yellowstone boards
***********************************************************************/
#ifndef __CONFIG_H
#define __CONFIG_H
/*-----------------------------------------------------------------------
* High Level Configuration Options
*----------------------------------------------------------------------*/
-#define CONFIG_YOSEMITE 1 /* Board is BAMBOO */
-#define CONFIG_440_EP 1 /* Specific PPC440EP support */
-
-#define CONFIG_4xx 1 /* ... PPC4xx family */
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
-#undef CFG_DRAM_TEST /* disable - takes long time! */
+/* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
+#ifndef CONFIG_YELLOWSTONE
+#define CONFIG_440EP 1 /* Specific PPC440EP support */
+#define CONFIG_HOSTNAME yosemite
+#else
+#define CONFIG_440GR 1 /* Specific PPC440GR support */
+#define CONFIG_HOSTNAME yellowstone
+#endif
+#define CONFIG_440 1 /* ... PPC440 family */
+#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
+/*
+ * Include common defines/options for all AMCC eval boards
+ */
+#include "amcc-common.h"
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
+#define CONFIG_BOARD_RESET 1 /* call board_reset() */
+
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
-#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
-#define CFG_FLASH_BASE 0xfe000000 /* start of FLASH */
-#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
-#define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory */
-#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
-#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
-#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
-
+#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
+#define CONFIG_SYS_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
+#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000
+#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
+#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
/*Don't change either of these*/
-#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
-#define CFG_PCI_BASE 0xe0000000 /* internal PCI regs */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
+#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/
/*Don't change either of these*/
-#define CFG_USB_DEVICE 0x50000000
-#define CFG_NVRAM_BASE_ADDR 0x80000000
-#define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000)
+#define CONFIG_SYS_USB_DEVICE 0x50000000
+#define CONFIG_SYS_NVRAM_BASE_ADDR 0x80000000
+#define CONFIG_SYS_BCSR_BASE (CONFIG_SYS_NVRAM_BASE_ADDR | 0x2000)
+#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
/*-----------------------------------------------------------------------
* Initial RAM & stack pointer (placed in SDRAM)
*----------------------------------------------------------------------*/
-#define CFG_INIT_RAM_ADDR 0xf0000000 /* DCache */
-#define CFG_INIT_RAM_END 0x2000
-#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
-
-#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
-#define CFG_KBYTES_SDRAM ( 128 * 1024) /* 128MB */
-#define CFG_SDRAM_BANKS (2)
+#define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram */
+#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */
+#define CONFIG_SYS_INIT_RAM_END (4 << 10)
+#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data*/
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
-#define CONFIG_BAUDRATE 9600
-#define CONFIG_SERIAL_MULTI 1
+#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
/*define this if you want console on UART1*/
#undef CONFIG_UART1_CONSOLE
-#define CFG_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
-
/*-----------------------------------------------------------------------
- * NVRAM/RTC
- *
- * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
- * The DS1558 code assumes this condition
- *
+ * Environment
*----------------------------------------------------------------------*/
-#define CFG_NVRAM_SIZE (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
-#define CONFIG_RTC_DS1556 1 /* DS1556 RTC */
+/*
+ * Define here the location of the environment variables (FLASH or EEPROM).
+ * Note: DENX encourages to use redundant environment in FLASH.
+ */
+#if 1
+#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+#else
+#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
+#endif
/*-----------------------------------------------------------------------
* FLASH related
*----------------------------------------------------------------------*/
-#if 1 /* test-only */
-#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
-#define CFG_MAX_FLASH_SECT 256 /* sectors per device */
+#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
+#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
-#undef CFG_FLASH_CHECKSUM
-#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CFG_FLASH_WRITE_TOUT 120000 /* Timeout for Flash Write (in ms) */
-#else
-#define CFG_FLASH_CFI /* The flash is CFI compatible */
-#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
-#define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
-#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-#endif
+#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+
+#ifdef CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+#endif /* CONFIG_ENV_IS_IN_FLASH */
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
+#define CONFIG_SYS_KBYTES_SDRAM (128 * 1024) /* 128MB */
+#define CONFIG_SYS_SDRAM_BANKS (2)
/*-----------------------------------------------------------------------
* I2C
*----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_SLAVE 0x7F
-
+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
+
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
+
+#ifdef CONFIG_ENV_IS_IN_EEPROM
+#define CONFIG_ENV_SIZE 0x200 /* Size of Environment vars */
+#define CONFIG_ENV_OFFSET 0x0
+#endif /* CONFIG_ENV_IS_IN_EEPROM */
+
+/* I2C SYSMON (LM75, AD7414 is almost compatible) */
+#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
+#define CONFIG_DTT_AD7414 1 /* use AD7414 */
+#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
+#define CONFIG_SYS_DTT_MAX_TEMP 70
+#define CONFIG_SYS_DTT_LOW_TEMP -30
+#define CONFIG_SYS_DTT_HYSTERESIS 3
-/*-----------------------------------------------------------------------
- * Environment
- *----------------------------------------------------------------------*/
-#undef CFG_ENV_IS_IN_NVRAM /*No NVRAM on board*/
-#undef CFG_ENV_IS_IN_FLASH /* ... not in flash */
-#define CFG_ENV_IS_IN_EEPROM 1
-
-/* Define to allow the user to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CFG_I2C_MULTI_EEPROMS
-#define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
-#define CFG_ENV_OFFSET 0x0
-#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
-#define CFG_I2C_EEPROM_ADDR_LEN 1
-#define CFG_EEPROM_PAGE_WRITE_ENABLE
-#define CFG_EEPROM_PAGE_WRITE_BITS 3
-#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
-
-#define CONFIG_BOOTCOMMAND "bootm 0xfe000000" /* autoboot command */
-#define CONFIG_BOOTDELAY 3 /* disable autoboot */
-
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-
-#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_NET_MULTI 1 /* required for netconsole */
-#define CONFIG_PHY1_ADDR 3
+/*
+ * Default environment variables
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_AMCC_DEF_ENV \
+ CONFIG_AMCC_DEF_ENV_POWERPC \
+ CONFIG_AMCC_DEF_ENV_PPC_OLD \
+ CONFIG_AMCC_DEF_ENV_NOR_UPD \
+ "kernel_addr=fc000000\0" \
+ "ramdisk_addr=fc180000\0" \
+ ""
+
+#define CONFIG_HAS_ETH0 1 /* add support for "ethaddr" */
#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 10.0.4.251
-#define CONFIG_ETHADDR 00:10:EC:00:12:34
-#define CONFIG_ETH1ADDR 00:10:EC:00:12:35
-
-#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SERVERIP 10.0.4.115
+#define CONFIG_PHY1_ADDR 3
/* Partitions */
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION
-#ifdef CONFIG_440_EP
+#ifdef CONFIG_440EP
/* USB */
-#define CONFIG_USB_OHCI
+#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_OHCI_BE_CONTROLLER
+
+#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
+#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE (CONFIG_SYS_PERIPHERAL_BASE | 0x1000)
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ppc440"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
-/*Comment this out to enable USB 1.1 device*/
+/* Comment this out to enable USB 1.1 device */
#define USB_2_0_DEVICE
-#endif /*CONFIG_440_EP*/
+
+#define CONFIG_SUPPORT_VFAT
+#endif /* CONFIG_440EP */
#ifdef DEBUG
#define CONFIG_PANIC_HANG
#define CONFIG_HW_WATCHDOG /* watchdog */
#endif
-#ifdef CONFIG_440_EP
- /* Need to define POST */
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ECHO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- /* CFG_CMD_EXT2 |*/ \
- /* CFG_CMD_FAT |*/ \
- CFG_CMD_I2C | \
- /* CFG_CMD_IDE |*/ \
- CFG_CMD_IRQ | \
- /* CFG_CMD_KGDB |*/ \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_FLASH | \
- /* CFG_CMD_SPI |*/ \
- CFG_CMD_USB | \
- 0 ) & ~CFG_CMD_IMLS)
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ECHO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- /* CFG_CMD_EXT2 |*/ \
- /* CFG_CMD_FAT |*/ \
- CFG_CMD_I2C | \
- /* CFG_CMD_IDE |*/ \
- CFG_CMD_IRQ | \
- /* CFG_CMD_KGDB |*/ \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_FLASH | \
- /* CFG_CMD_SPI |*/ \
- 0 ) & ~CFG_CMD_IMLS)
-#endif
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
- * Miscellaneous configurable options
+ * Commands additional to the ones defined in amcc-common.h
*/
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-
-#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
-#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
-
-#define CFG_LOAD_ADDR 0x100000 /* default load address */
-#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_LYNXKDI 1 /* support kdi files */
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_PCI
-#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#ifdef CONFIG_440EP
+ #define CONFIG_CMD_USB
+ #define CONFIG_CMD_FAT
+ #define CONFIG_CMD_EXT2
+#endif
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
*/
/* General PCI */
-#define CONFIG_PCI /* include pci support */
-#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
+#define CONFIG_PCI /* include pci support */
+#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
-#define CFG_PCI_TARGET_INIT
-#define CFG_PCI_MASTER_INIT
+#define CONFIG_SYS_PCI_TARGET_INIT
+#define CONFIG_SYS_PCI_MASTER_INIT
-#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
-#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
+#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
+#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* Whatever */
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */
-#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
+ * External Bus Controller (EBC) Setup
+ *----------------------------------------------------------------------*/
+#define CONFIG_SYS_FLASH CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CPLD 0x80000000
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* Memory Bank 0 (NOR-FLASH) initialization */
+#define CONFIG_SYS_EBC_PB0AP 0x03017300
+#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH | 0xda000)
+
+/* Memory Bank 2 (CPLD) initialization */
+#define CONFIG_SYS_EBC_PB2AP 0x04814500
+#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_CPLD | 0x18000)
+
+#define CONFIG_SYS_BCSR5_PCI66EN 0x80
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
#endif /* __CONFIG_H */
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