Merge with /home/m8/git/u-boot

[oweals/u-boot.git] / include / configs / xaeniax.h

diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 1177003c801e74d47bc4c7e184c22bdf68846d47..103976283013a937dcc704bfcf5a7871d09ce662 100644 (file)
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -36,16 +36,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/*
- * If we are developing, we might want to start armboot from ram
- * so we MUST NOT initialize critical regs like mem-timing ...
- */
-#define CONFIG_INIT_CRITICAL
-
-/*
-#undef CONFIG_INIT_CRITICAL
-*/
-
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -246,7 +236,7 @@
  * GP30 == SDATA_OUT is 0
  * GP81 == NSSPCLK   is 0
  */
-#define CFG_GPCR0_VAL          0x40C31868
+#define CFG_GPCR0_VAL          0x40C31848
 #define CFG_GPCR1_VAL          0x00000000
 #define CFG_GPCR2_VAL          0x00020000
 
@@ -465,10 +455,10 @@
  * [14:12] 010  - RRR2: CS deselect to CS time: 2*(2*MemClk) = 40 ns
  * [11:08] 0010 - RDN2: Address to data valid in bursts: (2+1)*MemClk = 30 ns
  * [07:04] 0110 - RDF2: Address for first access: (6+1)*MemClk = 70 ns
- * [03]    0    - 32 Bit bus width
+ * [03]    1    - 16 Bit bus width
  * [02:00] 100  - variable latency I/O
  */
-#define CFG_MSC1_VAL           0x1224A264
+#define CFG_MSC1_VAL           0x1224A26C
 
 /* This is the configuration for nCS4/5 -> LAN
  * configuration for nCS5: