hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT

[oweals/u-boot.git] / include / configs / vision2.h

diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index 56cbe3feb854dd4d0d15065b06ac9168993c0340..f6904f3f6ab11e29f575896d38cdbcdfa654e331 100644 (file)
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -36,11 +36,13 @@
 #define CONFIG_DISPLAY_BOARDINFO
 
 #define CONFIG_CMDLINE_TAG     /* enable passing of ATAGs */
-#define CONFIG_REVISION_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 #define CONFIG_BOARD_LATE_INIT
 
+#ifndef MACH_TYPE_TTC_VISION2
+#define MACH_TYPE_TTC_VISION2  2775
+#endif
 #define CONFIG_MACH_TYPE       MACH_TYPE_TTC_VISION2
 
 /*
@@ -52,7 +54,7 @@
  * Hardware drivers
  */
 #define CONFIG_MXC_UART
-#define CONFIG_SYS_MX51_UART3
+#define CONFIG_MXC_UART_BASE   UART3_BASE
 #define CONFIG_MXC_GPIO
 #define CONFIG_MXC_SPI
 #define CONFIG_HW_WATCHDOG
@@ -70,7 +72,7 @@
  * Use gpio 4 pin 25 as chip select for SPI flash
  * This corresponds to gpio 121
  */
-#define CONFIG_SPI_FLASH_CS    (1 | (121 << 8))
+#define CONFIG_SF_DEFAULT_CS   (1 | (121 << 8))
 #define CONFIG_SF_DEFAULT_MODE   SPI_MODE_0
 #define CONFIG_SF_DEFAULT_SPEED  25000000
 
@@ -87,12 +89,15 @@
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 
 /* PMIC Controller */
-#define CONFIG_FSL_PMIC
+#define CONFIG_PMIC
+#define CONFIG_PMIC_SPI
+#define CONFIG_PMIC_FSL
 #define CONFIG_FSL_PMIC_BUS    0
 #define CONFIG_FSL_PMIC_CS     0
 #define CONFIG_FSL_PMIC_CLK    2500000
 #define CONFIG_FSL_PMIC_MODE   SPI_MODE_0
-#define CONFIG_RTC_MC13783
+#define CONFIG_FSL_PMIC_BITLEN 32
+#define CONFIG_RTC_MC13XXX
 
 /*
  * MMC Configs
@@ -187,14 +192,15 @@
 #define PHYS_SDRAM_1_SIZE              (256 * 1024 * 1024)
 #define PHYS_SDRAM_2                   CSD1_BASE_ADDR
 #define PHYS_SDRAM_2_SIZE              (256 * 1024 * 1024)
-#define CONFIG_SYS_SDRAM_BASE          0x90000000
-#define CONFIG_SYS_INIT_RAM_ADDR       0x1FFE8000
-
-#define CONFIG_SYS_INIT_RAM_SIZE               (64 * 1024)
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - \
-                                       GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
-                                       CONFIG_SYS_GBL_DATA_OFFSET)
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
 #define CONFIG_BOARD_EARLY_INIT_F
 
 /* 166 MHz DDR RAM */