#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_SYS_CACHELINE_SIZE 32
-
#include <asm/arch/imx-regs.h>
#define CONFIG_VF610
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_FSL_CLK
#define CONFIG_MACH_TYPE 4146
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_CMD_NAND
-#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
/* UBI */
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO
"-(rootfs)"
#endif
-#define CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 1
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-
-#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
/* QSPI Configs*/
#ifdef CONFIG_FSL_QSPI
-#define CONFIG_CMD_SF
#define FSL_QSPI_FLASH_SIZE (1 << 24)
#define FSL_QSPI_FLASH_NUM 2
#define CONFIG_SYS_FSL_QSPI_LE
#endif
/* I2C Configs */
-#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_BOOTDELAY 3
#define CONFIG_SYS_LOAD_ADDR 0x82000000
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x80010000
#define CONFIG_SYS_MEMTEST_END 0x87C00000
#define CONFIG_ENV_OFFSET 0x180000
#endif
-#define CONFIG_CMD_BOOTZ
-
#endif