Merge branch '2020-05-07-more-kconfig-migrations'

[oweals/u-boot.git] / include / configs / usbarmory.h

diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 4bebc5959cccd581853b13ef41de9d5f753aa953..fcf5c67dc892bae63e205e23d7fa2855ba9b7462 100644 (file)
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -1,26 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * USB armory MkI board configuration settings
  * http://inversepath.com/usbarmory
  *
  * Copyright (C) 2015, Inverse Path
  * Andrej Rosano <andrej@inversepath.com>
- *
- * SPDX-License-Identifier:|____GPL-2.0+
  */
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
 #define CONFIG_SYS_FSL_CLK
-#define CONFIG_MXC_GPIO
 
 #include <asm/arch/imx-regs.h>
 
-#include <config_distro_defaults.h>
-
 /* U-Boot environment */
-#define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
-#define CONFIG_ENV_SIZE                (8 * 1024)
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 /* U-Boot general configurations */
@@ -29,15 +23,12 @@
 /* UART */
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE   UART1_BASE
-#define CONFIG_CONS_INDEX      1
 
 /* SD/MMC */
-#define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
 /* USB */
-#define CONFIG_USB_EHCI_MX5
 #define CONFIG_MXC_USB_PORT    1
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
@@ -53,11 +44,10 @@
 
 /* U-Boot memory offsets */
 #define CONFIG_LOADADDR                0x72000000
-#define CONFIG_SYS_TEXT_BASE   0x77800000
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Linux boot */
-#define CONFIG_HOSTNAME                usbarmory
+#define CONFIG_HOSTNAME                "usbarmory"
 #define CONFIG_BOOTCOMMAND                                             \
        "run distro_bootcmd; "                                          \
        "setenv bootargs console=${console} ${bootargs_default}; "      \
@@ -89,7 +79,6 @@
 #endif
 
 /* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS           1
 #define PHYS_SDRAM                     CSD0_BASE_ADDR
 #define PHYS_SDRAM_SIZE                        (gd->ram_size)
 
@@ -102,9 +91,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_SYS_MEMTEST_START       0x70000000
-#define CONFIG_SYS_MEMTEST_END         0x90000000
-
 #define CONFIG_SYS_MALLOC_LEN          (10 * 1024 * 1024)
 
 #endif                         /* __CONFIG_H */