Merge tag 'u-boot-rockchip-20191124' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / include / configs / ti816x_evm.h

diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 1898a8235618d4e5ef2fa90f5598e7f10056c343..1d3b2a392237962dbe3c4e279440da662158eb23 100644 (file)
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * ti816x_evm.h
  *
  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
  * Antoine Tenart, <atenart@adeneo-embedded.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_TI816X_EVM_H
@@ -13,13 +12,12 @@
 #include <configs/ti_armv7_omap.h>
 #include <asm/arch/omap.h>
 
-#define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_MACH_TYPE               MACH_TYPE_TI8168EVM
 
 #define CONFIG_EXTRA_ENV_SETTINGS      \
        DEFAULT_LINUX_BOOT_ENV \
-       "mtdids=" MTDIDS_DEFAULT "\0" \
-       "mtdparts=" MTDPARTS_DEFAULT "\0" \
+       "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+       "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
 
 #define CONFIG_BOOTCOMMAND                     \
        "mmc rescan;"                           \
@@ -53,10 +51,6 @@
 /* allow overwriting serial config and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 
-#define CONFIG_SERIAL1
-#define CONFIG_SERIAL2
-#define CONFIG_SERIAL3
-#define CONFIG_CONS_INDEX      1
 
 /*
  * GPMC NAND block.  We support 1 device and the physical address to
@@ -66,19 +60,15 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* NAND: SPL related configs */
-#define CONFIG_SPL_NAND_AM33XX_BCH
 
 /* NAND: device related configs */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 /* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
                                         10, 11, 12, 13, 14, 15, 16, 17, \
@@ -92,39 +82,16 @@
 #define CONFIG_SYS_NAND_ECCBYTES       14
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW
-#define MTDIDS_DEFAULT                 "nand0=nand.0"
-#define MTDPARTS_DEFAULT               "mtdparts=nand.0:" \
-                                       "128k(NAND.SPL)," \
-                                       "128k(NAND.SPL.backup1)," \
-                                       "128k(NAND.SPL.backup2)," \
-                                       "128k(NAND.SPL.backup3)," \
-                                       "256k(NAND.u-boot-spl-os)," \
-                                       "1m(NAND.u-boot)," \
-                                       "128k(NAND.u-boot-env)," \
-                                       "128k(NAND.u-boot-env.backup1)," \
-                                       "8m(NAND.kernel)," \
-                                       "-(NAND.file-system)"
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x000c0000
-#define CONFIG_ENV_OFFSET              0x001c0000
-#define CONFIG_ENV_OFFSET_REDUND       0x001e0000
 #define CONFIG_SYS_ENV_SECT_SIZE       CONFIG_SYS_NAND_BLOCK_SIZE
 
 /* SPL */
 /* Defines for SPL */
-#define CONFIG_SPL_NAND_AM33XX_BCH     /* ELM support */
-#define CONFIG_SPL_TEXT_BASE    0x40400000
 #define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
                                         CONFIG_SPL_TEXT_BASE)
 
-#define CONFIG_SYS_TEXT_BASE        0x80800000
-
-#define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_NET_RETRY_COUNT 10
 
 /* Since SPL did pll and ddr initialization for us,