Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx

[oweals/u-boot.git] / include / configs / socrates.h

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 4e10786ed8c0f9073ebcc5a28aa4d2f04ac02567..a03005902fa89d64f651894b6a17fcd33170f4a4 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -19,8 +19,6 @@
 /* High Level Configuration Options */
 #define CONFIG_SOCRATES                1
 
-#define CONFIG_PCI_INDIRECT_BRIDGE
-
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
@@ -148,50 +146,7 @@
 #define CONFIG_SYS_BR2_PRELIM          0xc80018a1      /* UPMB, 32-bit */
 #define CONFIG_SYS_OR2_PRELIM          0xfc000000      /* 64 MB        */
 
-#define CONFIG_VIDEO_MB862xx
-#define CONFIG_VIDEO_MB862xx_ACCEL
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_VIDEO_BMP_LOGO
-#define VIDEO_FB_16BPP_PIXEL_SWAP
-#define VIDEO_FB_16BPP_WORD_SWAP
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_VIDEO_BMP_GZIP
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)       /* decompressed img */
-
-/* SDRAM Clock frequency, 100MHz (0x0000) or 133MHz (0x10000) */
-#define CONFIG_SYS_MB862xx_CCF         0x10000
-/* SDRAM parameter */
-#define CONFIG_SYS_MB862xx_MMR         0x4157BA63
-
-/* Serial Port */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    1
-#define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
-
-#define CONFIG_SYS_NS16550_COM1        (CONFIG_SYS_CCSRBAR+0x4500)
-#define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_CCSRBAR+0x4600)
-
-#define CONFIG_SYS_BAUDRATE_TABLE  \
-       {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED       102124
-#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED      102124
-#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
-
-/* I2C RTC */
-#define CONFIG_SYS_I2C_RTC_ADDR        0x32    /* at address 0x32              */
-
-/* I2C W83782G HW-Monitoring IC */
-#define CONFIG_SYS_I2C_W83782G_ADDR    0x28    /* W83782G address              */
+#define CONFIG_SYS_SPD_BUS_NUM 0
 
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      4
 
@@ -199,7 +154,6 @@
  * General PCI
  * Memory space is mapped 1-1.
  */
-#define CONFIG_SYS_PCI_PHYS            0x80000000      /* 1G PCI TLB */
 
 /* PCI is clocked by the external source at 33 MHz */
 #define CONFIG_PCI_CLK_FREQ    33000000
@@ -210,10 +164,6 @@
 #define CONFIG_SYS_PCI1_IO_PHYS        CONFIG_SYS_PCI1_IO_BASE
 #define CONFIG_SYS_PCI1_IO_SIZE        0x01000000      /* 16M                  */
 
-#if defined(CONFIG_PCI)
-#undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
-#endif /* CONFIG_PCI */
-
 #define CONFIG_TSEC1   1
 #define CONFIG_TSEC1_NAME      "TSEC0"
 #define CONFIG_TSEC3   1
@@ -335,8 +285,6 @@
 /* USB support */
 #define CONFIG_USB_OHCI_NEW            1
 #define CONFIG_PCI_OHCI                        1
-#define CONFIG_PCI_OHCI_DEVNO          3 /* Number in PCI list */
-#define CONFIG_PCI_EHCI_DEVNO          (CONFIG_PCI_OHCI_DEVNO / 2)
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     15
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "ohci_pci"
 #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS        1