powerpc/85xx: Fix NAND SPL support

[oweals/u-boot.git] / include / configs / sbc8548.h

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 3624d3790579353d8fb18c1b33a5a859d8c84b3c..ba7612c5a1c96e2a5da586739c4dac27b2d39a5b 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -57,6 +57,10 @@
 #define CONFIG_MPC8548         1       /* MPC8548 specific */
 #define CONFIG_SBC8548         1       /* SBC8548 board specific */
 
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xfffa0000
+#endif
+
 #undef CONFIG_RIO
 
 #ifdef CONFIG_PCI
@@ -99,14 +103,8 @@
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x00400000
 
-/*
- * Base addresses -- Note these are effective addresses where the
- * actual resources get mapped (not physical addresses)
- */
-#define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default */
-#define CONFIG_SYS_CCSRBAR             0xe0000000      /* relocated CCSRBAR */
-#define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
+#define CONFIG_SYS_CCSRBAR             0xe0000000
+#define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
 #define CONFIG_FSL_DDR2
@@ -317,12 +315,11 @@
 
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0xe4010000      /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_END        0x4000          /* End of used area in RAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       0x4000          /* Size of used area in RAM */
 
 #define CONFIG_SYS_INIT_L2_ADDR        0xf8f80000      /* relocate boot L2SRAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
@@ -407,7 +404,6 @@
 
 #if defined(CONFIG_PCI)
 
-#define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
@@ -420,10 +416,6 @@
 
 #if defined(CONFIG_TSEC_ENET)
 
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI       1
-#endif
-
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_TSEC1   1
 #define CONFIG_TSEC1_NAME      "eTSEC0"
@@ -515,14 +507,6 @@
  */
 #define CONFIG_SYS_BOOTMAPSZ   (8 << 20)       /* Initial Memory map for Linux*/
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM  0x02            /* Software reboot */
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
@@ -543,8 +527,8 @@
 #define CONFIG_IPADDR   192.168.0.55
 
 #define CONFIG_HOSTNAME         sbc8548
-#define CONFIG_ROOTPATH         /opt/eldk/ppc_85xx
-#define CONFIG_BOOTFILE         /uImage
+#define CONFIG_ROOTPATH         "/opt/eldk/ppc_85xx"
+#define CONFIG_BOOTFILE         "/uImage"
 #define CONFIG_UBOOTPATH /u-boot.bin   /* TFTP server */
 
 #define CONFIG_SERVERIP         192.168.0.2