mpc83xx: Simplify BR,OR lines
[oweals/u-boot.git] / include / configs / sbc8349.h
index edf76e58519429a9800e33b67460ffb369a22c3b..09cdb7c1a8a407c6e90e732412ab78b44a82485e 100644 (file)
 #define CONFIG_SYS_FLASH_BASE          0xFF800000      /* start of FLASH   */
 #define CONFIG_SYS_FLASH_SIZE          8               /* flash size in MB */
 
-#define CONFIG_SYS_BR0_PRELIM          (CONFIG_SYS_FLASH_BASE \
-                                       | BR_PS_16      /* 16 bit port */ \
-                                       | BR_MS_GPCM    /* MSEL = GPCM */ \
-                                       | BR_V)         /* valid */
-
-#define CONFIG_SYS_OR0_PRELIM          (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
-                                       | OR_GPCM_XAM \
-                                       | OR_GPCM_CSNT \
-                                       | OR_GPCM_ACS_DIV2 \
-                                       | OR_GPCM_XACS \
-                                       | OR_GPCM_SCY_15 \
-                                       | OR_GPCM_TRLX_SET \
-                                       | OR_GPCM_EHTR_SET \
-                                       | OR_GPCM_EAD)
-                                       /* 0xFF806FF7 */
+/* FLASH */
+#define CONFIG_SYS_BR0_PRELIM          (0xFF800000 | BR_PS_16 | BR_MS_GPCM | BR_V)
+#define CONFIG_SYS_OR0_PRELIM          (OR_AM_8MB | OR_GPCM_XAM | OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET | OR_GPCM_EAD)
 
 #define CONFIG_SYS_MAX_FLASH_BANKS     1       /* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT      64      /* sectors per device */
  * 1111 1100 0000 0000 0110 1001 0000 0001 = FC006901
  */
 
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_LBC_SDRAM_SIZE) \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_64MB \
                        | OR_SDRAM_XAM \
                        | ((9 - OR_SDRAM_MIN_COLS) << OR_SDRAM_COLS_SHIFT) \
                        | ((13 - OR_SDRAM_MIN_ROWS) << OR_SDRAM_ROWS_SHIFT) \