Merge branch 'master' of git://git.denx.de/u-boot-nios

[oweals/u-boot.git] / include / configs / sbc2410x.h

diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h
index eab9629c077ce83f413024d9c55cb2a48abcd1da..e6886cf7f6f86c8ec88d2e408b9e3d394683ce5f 100644 (file)
--- a/include/configs/sbc2410x.h
+++ b/include/configs/sbc2410x.h
@@ -63,9 +63,10 @@
 /*
  * Hardware drivers
  */
-#define CONFIG_DRIVER_CS8900   1       /* we have a CS8900 on-board */
-#define CS8900_BASE            0x19000300
-#define CS8900_BUS16           1 /* the Linux driver does accesses as shorts */
+#define CONFIG_NET_MULTI
+#define CONFIG_CS8900          /* we have a CS8900 on-board */
+#define CONFIG_CS8900_BASE     0x19000300
+#define CONFIG_CS8900_BUS16    /* the Linux driver does accesses as shorts */
 
 /*
  * select serial console configuration
@@ -138,9 +139,7 @@
 
 #define        CONFIG_SYS_LOAD_ADDR            0x33000000      /* default load address */
 
-/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
-/* it to wrap 100 times (total 1562500) to get 1 sec. */
-#define        CONFIG_SYS_HZ                   1562500
+#define        CONFIG_SYS_HZ                   1000
 
 /* valid baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
@@ -201,29 +200,6 @@
 #if defined(CONFIG_CMD_NAND)
 #define CONFIG_NAND_S3C2410
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND devices           */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN    0x00
-#define NAND_MAX_FLOORS 1
-
-#define NAND_WAIT_READY(nand)  NF_WaitRB()
-#define NAND_DISABLE_CE(nand)  NF_SetCE(NFCE_HIGH)
-#define NAND_ENABLE_CE(nand)   NF_SetCE(NFCE_LOW)
-#define WRITE_NAND_COMMAND(d, adr)     NF_Cmd(d)
-#define WRITE_NAND_COMMANDW(d, adr)    NF_CmdW(d)
-#define WRITE_NAND_ADDRESS(d, adr)     NF_Addr(d)
-#define WRITE_NAND(d, adr)             NF_Write(d)
-#define READ_NAND(adr)                 NF_Read()
-/* the following functions are NOP's because S3C24X0 handles this in hardware */
-#define NAND_CTL_CLRALE(nandptr)
-#define NAND_CTL_SETALE(nandptr)
-#define NAND_CTL_CLRCLE(nandptr)
-#define NAND_CTL_SETCLE(nandptr)
-/* #undef CONFIG_MTD_NAND_VERIFY_WRITE */
 #endif /* CONFIG_CMD_NAND */
 
 #define CONFIG_SETUP_MEMORY_TAGS