Merge git://git.denx.de/u-boot-net

[oweals/u-boot.git] / include / configs / salvator-x.h

diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index d1d615c8a76a626c6c3061b8e4b5167b3ae77ded..0ac39003266e25ec02bd07071fb6822e799fe1cf 100644 (file)
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -20,22 +20,27 @@
 #define CONFIG_SCIF_CONSOLE
 #define CONFIG_CONS_SCIF2
 #define CONFIG_CONS_INDEX      2
-#define CONFIG_SH_SCIF_CLK_FREQ        CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ        CONFIG_S3D4_CLK_FREQ
 
 /* [A] Hyper Flash */
 /* use to RPC(SPI Multi I/O Bus Controller) */
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ENV_IS_NOWHERE
+
+/* Ethernet RAVB */
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_MICREL
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
 #define RCAR_XTAL_CLK          33333333u
 #define CONFIG_SYS_CLK_FREQ    RCAR_XTAL_CLK
 /* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
-/* CPclk 16.66MHz, S3D2 133.33MHz                          */
+/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz          */
 #define CONFIG_CP_CLK_FREQ     (CONFIG_SYS_CLK_FREQ / 2)
 #define CONFIG_PLL1_CLK_FREQ   (CONFIG_SYS_CLK_FREQ * 192 / 2)
 #define CONFIG_S3D2_CLK_FREQ   (266666666u/2)
+#define CONFIG_S3D4_CLK_FREQ   (266666666u/4)
 
 /* Generic Timer Definitions (use in assembler source) */
 #define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
@@ -45,9 +50,39 @@
 #define GICD_BASE      0xF1010000
 #define GICC_BASE      0xF1020000
 
+/* i2c */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SH
+#define CONFIG_SYS_I2C_SLAVE           0x60
+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS      1
+#define CONFIG_SYS_I2C_SH_SPEED0       400000
+#define CONFIG_SH_I2C_DATA_HIGH                4
+#define CONFIG_SH_I2C_DATA_LOW         5
+#define CONFIG_SH_I2C_CLOCK            10000000
+
+#define CONFIG_SYS_I2C_POWERIC_ADDR    0x30
+
+/* USB */
+#ifdef CONFIG_R8A7795
+#define CONFIG_USB_MAX_CONTROLLER_COUNT        3
+#else
+#define CONFIG_USB_MAX_CONTROLLER_COUNT        2
+#endif
+
+/* SDHI */
+#define CONFIG_SH_SDHI_FREQ            200000000
+
+/* Environment in eMMC, at the end of 2nd "boot sector" */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
+#define CONFIG_SYS_MMC_ENV_DEV         1
+#define CONFIG_SYS_MMC_ENV_PART                2
+
 /* Module stop status bits */
 /* MFIS, SCIF1 */
 #define CONFIG_SMSTP2_ENA      0x00002040
+/* SCIF2 */
+#define CONFIG_SMSTP3_ENA      0x00000400
 /* INTC-AP, IRQC */
 #define CONFIG_SMSTP4_ENA      0x00000180