Socrates: config file cleanup.

[oweals/u-boot.git] / include / configs / rsdproto.h

diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h
index 6c9e392c36b86db744bc9c10bc115df812cb53f0..6251383f5586ec48280a68e0f2957014d20293b1 100644 (file)
--- a/include/configs/rsdproto.h
+++ b/include/configs/rsdproto.h
@@ -53,7 +53,7 @@
  */
 #undef CONFIG_CONS_ON_SMC              /* define if console on SMC */
 #define        CONFIG_CONS_ON_SCC              /* define if console on SCC */
-#undef         CONFIG_CONS_NONE                /* define if console on neither */
+#undef CONFIG_CONS_NONE                /* define if console on neither */
 #define CONFIG_CONS_INDEX      1       /* which SMC/SCC channel for console */
 
 /*
@@ -64,8 +64,7 @@
  * for FCC)
  *
  * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
  */
 #undef CONFIG_ETHER_ON_SCC             /* define if ethernet on SCC    */
 #define        CONFIG_ETHER_ON_FCC             /* define if ethernet on FCC    */
@@ -92,9 +91,9 @@
 #define CONFIG_ENV_OVERWRITE
 
 /* enable I2C */
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support */
-#define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
-#define CFG_I2C_SLAVE          0x7F
+#define CONFIG_HARD_I2C                1       /* I2C with hardware support */
+#define CFG_I2C_SPEED          50000   /* I2C speed and slave address */
+#define CFG_I2C_SLAVE          0x30
 
 
 /* system clock rate (CLKIN) - equal to the 60x and local bus speed */
@@ -102,7 +101,23 @@
 
 #define CONFIG_BAUDRATE                115200
 
-#define CONFIG_COMMANDS                (CONFIG_CMD_DFL & ~CFG_CMD_KGDB)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_KGDB
+
 
 /* Define this if you want to boot from 0x00000100. If you don't define
  * this, you will need to program the bootloader to 0xfff00000, and
@@ -112,15 +127,12 @@
  */
 #define CFG_RSD_BOOT_LOW 1
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
 #define CONFIG_BOOTDELAY       5
-#define CONFIG_BOOTARGS        "devfs=mount root=ramfs"
+#define CONFIG_BOOTARGS                "devfs=mount root=ramfs"
 #define CONFIG_ETHADDR         08:00:3e:26:0a:5a
 #define CONFIG_NETMASK          255.255.0.0
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400          /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2               /* which serial port to use */
 #endif
@@ -130,7 +142,7 @@
  */
 #define        CFG_LONGHELP                            /* undef to save memory         */
 #define        CFG_PROMPT              "=> "           /* Monitor Command Prompt       */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define        CFG_CBSIZE              1024            /* Console I/O Buffer Size      */
 #else
 #define        CFG_CBSIZE              256             /* Console I/O Buffer Size      */
@@ -164,14 +176,14 @@
 #define PHYS_SDRAM_LOCAL       0x40000000 /* SDRAM (Local Bus) */
 #define PHYS_SDRAM_LOCAL_SIZE  0x04000000 /* 64 MB */
 
-#define PHYS_DPRAM_PCI         0xE8000000 /* DPRAM PPC/PCI */
-#define PHYS_DPRAM_PCI_SIZE    0x00020000 /* 128 KB */
+#define PHYS_DPRAM_PCI         0xE8000000 /* DPRAM PPC/PCI */
+#define PHYS_DPRAM_PCI_SIZE    0x00020000 /* 128 KB */
 
 /*#define PHYS_DPRAM_PCI_SEM   0x04020000 / * DPRAM PPC/PCI Semaphore */
 /*#define PHYS_DPRAM_PCI_SEM_SIZE      0x00000001 / * 1 Byte */
 
-#define PHYS_DPRAM_SHARC               0xE8100000 /* DPRAM PPC/Sharc */
-#define PHYS_DPRAM_SHARC_SIZE  0x00040000 /* 256 KB */
+#define PHYS_DPRAM_SHARC       0xE8100000 /* DPRAM PPC/Sharc */
+#define PHYS_DPRAM_SHARC_SIZE  0x00040000 /* 256 KB */
 
 /*#define PHYS_DPRAM_SHARC_SEM 0x04140000 / * DPRAM PPC/Sharc Semaphore */
 /*#define PHYS_DPRAM_SHARC_SEM_SIZE 0x00000001 / * 1 Byte */
@@ -287,7 +299,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE     32      /* For MPC8260 CPU                      */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */
 #endif