apalis/colibri imx6: provide proper fdtfile value

[oweals/u-boot.git] / include / configs / rk3288_common.h

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 4cf71fa17e150427b8ccf63e21a049d36d9bfa3c..7c79ed6138241a4fa3ba81b956721ee90487edfa 100644 (file)
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -1,19 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #ifndef __CONFIG_RK3288_COMMON_H
 #define __CONFIG_RK3288_COMMON_H
 
-#include <asm/arch/hardware.h>
+#include <asm/arch-rockchip/hardware.h>
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_NR_DRAM_BANKS           1
-#define CONFIG_ENV_SIZE                        0x2000
-#define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_MALLOC_LEN          (32 << 20)
 #define CONFIG_SYS_CBSIZE              1024
 
@@ -21,24 +17,12 @@
 #define        CONFIG_SYS_TIMER_BASE           0xff810020 /* TIMER7 */
 #define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
-
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
-#define CONFIG_SYS_TEXT_BASE           0x00000000
-#else
-#define CONFIG_SYS_TEXT_BASE           0x00100000
 #endif
 #define CONFIG_SYS_INIT_SP_ADDR                0x00100000
 #define CONFIG_SYS_LOAD_ADDR           0x00800800
 #define CONFIG_SPL_STACK               0xff718000
-#define CONFIG_SPL_TEXT_BASE           0xff704004
-
-/* MMC/SD IP block */
-#define CONFIG_BOUNCE_BUFFER
-
-#define CONFIG_FAT_WRITE
 
 /* RAW SD card / eMMC locations. */
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     (128 << 10)
@@ -48,45 +32,16 @@
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME                "u-boot.img"
 
 #define CONFIG_SYS_SDRAM_BASE          0
-#define CONFIG_NR_DRAM_BANKS           1
 #define SDRAM_BANK_SIZE                        (2UL << 30)
-
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI
-#define CONFIG_SF_DEFAULT_SPEED 20000000
+#define SDRAM_MAX_SIZE                 0xfe000000
 
 #ifndef CONFIG_SPL_BUILD
 /* usb otg */
-#define CONFIG_USB_GADGET
-#define CONFIG_USB_GADGET_DUALSPEED
-#define CONFIG_USB_GADGET_DWC2_OTG
-#define CONFIG_ROCKCHIP_USB2_PHY
-#define CONFIG_USB_GADGET_VBUS_DRAW    0
-
-/* fastboot  */
-#define CONFIG_CMD_FASTBOOT
-#define CONFIG_USB_FUNCTION_FASTBOOT
-#define CONFIG_FASTBOOT_FLASH
-#define CONFIG_FASTBOOT_FLASH_MMC_DEV  1       /* eMMC */
-#define CONFIG_FASTBOOT_BUF_ADDR       CONFIG_SYS_LOAD_ADDR
-#define CONFIG_FASTBOOT_BUF_SIZE       0x08000000
 
 /* usb mass storage */
-#define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_CMD_USB_MASS_STORAGE
 
-#define CONFIG_USB_GADGET_DOWNLOAD
-#define CONFIG_G_DNL_MANUFACTURER      "Rockchip"
-#define CONFIG_G_DNL_VENDOR_NUM                0x2207
-#define CONFIG_G_DNL_PRODUCT_NUM       0x320a
-
 /* usb host support */
-#ifdef CONFIG_CMD_USB
-#define CONFIG_USB_DWC2
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_SMSC95XX
-#define CONFIG_USB_ETHER_ASIX
-#endif
 #define ENV_MEM_LAYOUT_SETTINGS \
        "scriptaddr=0x00000000\0" \
        "pxefile_addr_r=0x00100000\0" \
@@ -101,6 +56,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "fdt_high=0x0fffffff\0" \
        "initrd_high=0x0fffffff\0" \
+       "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
        "partitions=" PARTS_DEFAULT \
        ENV_MEM_LAYOUT_SETTINGS \
        ROCKCHIP_DEVICE_SETTINGS \