tegra: i2c: Select number of controllers for Tegra2 boards

[oweals/u-boot.git] / include / configs / omap3_zoom1.h

diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index fbac22235cd6c2bb3a64d236e442b7250c8d38f4..17608f5f28075c8551d2efce4c0fc58468153133 100644 (file)
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -34,7 +34,6 @@
  */
 #define CONFIG_OMAP            1       /* in a TI OMAP core */
 #define CONFIG_OMAP34XX                1       /* which is a 34XX */
-#define CONFIG_OMAP3430                1       /* which is in a 3430 */
 #define CONFIG_OMAP3_ZOOM1     1       /* working with Zoom MDK Rev1 */
 
 #define CONFIG_SDRC    /* The chip has SDRC controller */
@@ -100,9 +99,6 @@
 #define CONFIG_OMAP_HSMMC              1
 #define CONFIG_DOS_PARTITION           1
 
-/* DDR - I use Micron DDR */
-#define CONFIG_OMAP3_MICRON_DDR                1
-
 /* USB */
 #define CONFIG_MUSB_UDC                        1
 #define CONFIG_USB_OMAP3               1
@@ -259,10 +255,6 @@
  * The stack sizes are set up in start.S using the settings below
  */
 #define CONFIG_STACKSIZE       (128 << 10)     /* regular stack 128 KiB */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ   (4 << 10)       /* IRQ stack 4 KiB */
-#define CONFIG_STACKSIZE_FIQ   (4 << 10)       /* FIQ stack 4 KiB */
-#endif
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map
@@ -272,9 +264,6 @@
 #define PHYS_SDRAM_1_SIZE      (32 << 20)      /* at least 32 MiB */
 #define PHYS_SDRAM_2           OMAP34XX_SDRC_CS1
 
-/* SDRAM Bank Allocation method */
-#define SDRC_R_B_C             1
-
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
@@ -303,4 +292,6 @@
 #define CONFIG_ENV_OFFSET              SMNAND_ENV_OFFSET
 #define CONFIG_ENV_ADDR                        SMNAND_ENV_OFFSET
 
+#define CONFIG_SYS_CACHELINE_SIZE      64
+
 #endif                         /* __CONFIG_H */