#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
+#define CONFIG_OMAP_GPIO
#define CONFIG_SDRC /* The chip has SDRC controller */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
-#undef CONFIG_USE_IRQ /* no support for IRQs */
#define CONFIG_MISC_INIT_R
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_OMAP_HSMMC 1
#define CONFIG_DOS_PARTITION 1
-/* DDR - I use Micron DDR */
-#define CONFIG_OMAP3_MICRON_DDR 1
-
/* commands to include */
#include <config_cmd_default.h>
"usbtty=cdc_acm\0" \
"loadaddr=0x82000000\0" \
"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
- "rw rootflags=bulk_read console=ttyS0,115200n8 " \
- "vram=6272K omapfb.vram=0:3000K\0" \
+ "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
#define CONFIG_BOOTCOMMAND \
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_PROMPT "Pandora # "
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ 1000
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
-#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
-#endif
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-/* SDRAM Bank Allocation method */
-#define SDRC_R_B_C 1
-
#define CONFIG_SYS_TEXT_BASE 0x80008000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800