/*
- * (C) Copyright 2008
- * Grazvydas Ignotas <notasas@gmail.com>
+ * (C) Copyright 2008-2010
+ * GraΕΎvydas Ignotas <notasas@gmail.com>
*
* Configuration settings for the OMAP3 Pandora.
*
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/sizes.h>
/*
* High Level Configuration Options
*/
-#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
+#define CONFIG_SDRC /* The chip has SDRC controller */
+
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap3.h>
#define CONFIG_INITRD_TAG 1
#define CONFIG_REVISION_TAG 1
+#define CONFIG_OF_LIBFDT 1
+
/*
* Size of malloc() pool
*/
-#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */
- /* Sector */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K)
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
- /* initial data */
+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
/*
* Hardware drivers
*/
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
+#define CONFIG_SYS_DEVICE_NULLDEV 1
+
+/* USB */
+#define CONFIG_MUSB_UDC 1
+#define CONFIG_USB_OMAP3 1
+#define CONFIG_TWL4030_USB 1
+
+/* USB device configuration */
+#define CONFIG_USB_DEVICE 1
+#define CONFIG_USB_TTY 1
+
/*
* NS16550 Configuration
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}
+#define CONFIG_GENERIC_MMC 1
#define CONFIG_MMC 1
-#define CONFIG_OMAP3_MMC 1
+#define CONFIG_OMAP_HSMMC 1
#define CONFIG_DOS_PARTITION 1
+/* DDR - I use Micron DDR */
+#define CONFIG_OMAP3_MICRON_DDR 1
+
/* commands to include */
#include <config_cmd_default.h>
#define CONFIG_CMD_EXT2 /* EXT2 Support */
#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_MMC /* MMC support */
#define CONFIG_CMD_NAND /* NAND support */
+#define CONFIG_CMD_CACHE /* Cache control */
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C_BUS 0
#define CONFIG_SYS_I2C_BUS_SELECT 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
+/*
+ * TWL4030
+ */
+#define CONFIG_TWL4030_POWER 1
+#define CONFIG_TWL4030_LED 1
+
/*
* Board NAND Info.
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV "nand0"
-/* start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET 0x680000
-#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
- /* partition */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_RBTREE
+#define CONFIG_LZO
+
+#define MTDIDS_DEFAULT "nand0=nand"
+#define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\
+ "1920k(uboot),128k(uboot-env),"\
+ "10m(boot),-(rootfs)"
+#else
+#define MTDPARTS_DEFAULT
+#endif
/* Environment information */
#define CONFIG_BOOTDELAY 1
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "usbtty=cdc_acm\0" \
"loadaddr=0x82000000\0" \
- "console=ttyS0,115200n8\0" \
- "videospec=omapfb:vram:2M,vram:4M\0" \
- "mmcargs=setenv bootargs console=${console} " \
- "video=${videospec} " \
- "root=/dev/mmcblk0p2 rw " \
- "rootfstype=ext3 rootwait\0" \
- "nandargs=setenv bootargs console=${console} " \
- "video=${videospec} " \
- "root=/dev/mtdblock4 rw " \
- "rootfstype=jffs2\0" \
- "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
- "source ${loadaddr}\0" \
- "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run mmcargs; " \
- "bootm ${loadaddr}\0" \
- "nandboot=echo Booting from nand ...; " \
- "run nandargs; " \
- "nand read ${loadaddr} 280000 400000; " \
- "bootm ${loadaddr}\0" \
+ "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
+ "rw rootflags=bulk_read console=ttyS0,115200n8 " \
+ "vram=6272K omapfb.vram=0:3000K\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
#define CONFIG_BOOTCOMMAND \
- "if mmc init; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
- "fi; " \
- "else run nandboot; fi"
+ "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
+ "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
+ "source ${loadaddr}; " \
+ "fi; " \
+ "ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
#define CONFIG_AUTO_COMPLETE 1
/*
* Miscellaneous configurable options
*/
-#define V_PROMPT "Pandora # "
-
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#define CONFIG_SYS_PROMPT V_PROMPT
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PROMPT "Pandora # "
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* address */
/*
- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
- * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
*/
-#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
-#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
+#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
+#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
-#define CONFIG_STACKSIZE SZ_128K /* regular stack */
+#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
+#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
+#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
#endif
/*-----------------------------------------------------------------------
*/
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
/* SDRAM Bank Allocation method */
#define SDRC_R_B_C 1
+#define CONFIG_SYS_TEXT_BASE 0x80008000
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE 0x800
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#define PISMO1_NAND_SIZE GPMC_SIZE_128M
#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
-#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
- /* one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
-#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
+#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-#define CONFIG_SYS_FLASH_BASE boot_flash_base
+#if defined(CONFIG_CMD_NAND)
+#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
+#endif
/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
#define CONFIG_ENV_IS_IN_NAND 1
-#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
-#define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
+#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
-#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
-#define CONFIG_ENV_OFFSET boot_flash_off
+#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
- CONFIG_SYS_MAX_NAND_DEVICE)
-#define CONFIG_SYS_JFFS2_MEM_NAND
-/* use flash_info[2] */
-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
-
-#ifndef __ASSEMBLY__
-extern gpmc_csx_t *nand_cs_base;
-extern gpmc_t *gpmc_cfg_base;
-extern unsigned int boot_flash_base;
-extern volatile unsigned int boot_flash_env_addr;
-extern unsigned int boot_flash_off;
-extern unsigned int boot_flash_sec;
-extern unsigned int boot_flash_type;
-#endif
-
#endif /* __CONFIG_H */