*
* (C) Copyright 2006
* Alex Bounine , Tundra Semiconductor Corp.
- * Roy Zang , Freescale Corp.
+ * Roy Zang , <tie-fei.zang@freescale.com> Freescale Corp.
*
* See file CREDITS for list of people who contributed to this
* project.
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
-/* Default MAC Addresses for on-chip GIGE Controller */
-
-#define CONFIG_ETHADDR 00:06:D2:00:00:01
-
#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:06:D2:00:00:02
#define CONFIG_ENV_OVERWRITE
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,7448@0"
#define OF_TSI "tsi108@c0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
#define CONFIG_NET_MULTI
-#define CONFIG_IPADDR 172.27.234.48
-#define CONFIG_SERVERIP 172.27.234.10
-#define CONFIG_NETMASK 255.255.0.0
-#define CONFIG_GATEWAYIP 172.27.255.254
-
#define CONFIG_BOOTFILE zImage.initrd.elf
#define CONFIG_LOADADDR 0x400000
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
-
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_CACHE \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C \
- | CFG_CMD_SDRAM \
- | CFG_CMD_EEPROM \
- | CFG_CMD_FLASH \
- | CFG_CMD_ENV \
- | CFG_CMD_BSP \
- | CFG_CMD_DHCP \
- | CFG_CMD_PING \
- | CFG_CMD_DATE)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DATE
+
/*set date in u-boot*/
#define CONFIG_RTC_M48T35A
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */
#else
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-/*
-#define CFG_DRAM_TEST
- * DRAM tests
- * CFG_DRAM_TEST - enables the following tests.
- *
- * CFG_DRAM_TEST_DATA - Enables test for shorted or open data lines
- * Environment variable 'test_dram_data' must be
- * set to 'y'.
- * CFG_DRAM_TEST_ADDRESS - Enables test to verify that each word
- * is uniquely addressable. Environment variable
- * 'test_dram_address' must be set to 'y'.
- * CFG_DRAM_TEST_WALK - Enables test a 64-bit walking ones pattern test.
- * This test takes about 6 minutes to test 64 MB.
- * Environment variable 'test_dram_walk' must be
- * set to 'y'.
- */
-#undef CFG_DRAM_TEST
#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
#define CFG_MEMTEST_END 0x07c00000 /* 4 ... 124 MB in DRAM */
-#if defined(CFG_DRAM_TEST)
-#define CFG_DRAM_TEST_DATA
-#define CFG_DRAM_TEST_ADDRESS
-#define CFG_DRAM_TEST_WALK
-#endif /* CFG_DRAM_TEST */
#define CFG_LOAD_ADDR 0x00400000 /* default load address */
/* PCI view of System Memory */
#define CFG_PCI_MEMORY_BUS 0x00000000
#define CFG_PCI_MEMORY_PHYS 0x00000000
-#define CFG_PCI_MEMORY_SIZE 0x80000000
+#define CFG_PCI_MEMORY_SIZE 0x80000000
/* PCI Memory Space */
#define CFG_PCI_MEM_BUS (CFG_PCI_MEM_PHYS)
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CFG_MAX_FLASH_BANKS 1/* Flash can be at one of two addresses */
+#define CFG_MAX_FLASH_BANKS 1 /* Flash can be at one of two addresses */
#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */
-#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE, CFG_FLASH_BASE2}
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, /* CFG_FLASH_BASE2 */ }
#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI
-#define CFG_FLASH_CFI_SWAP
+#define CFG_WRITE_SWAPPED_DATA
#define PHYS_FLASH_SIZE 0x01000000
#define CFG_MAX_FLASH_SECT (128)
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
projects / oweals / u-boot.git / blobdiff