xpedite1k: Cleanup coding style

[oweals/u-boot.git] / include / configs / mpc5121ads.h

diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index 9e3b0b7317d037bcfd9efa60277e670a675630ca..76f174db3fa57849adebf7dea7c287555c13448a 100644 (file)
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2007, 2008 DENX Software Engineering
+ * (C) Copyright 2007-2009 DENX Software Engineering
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -199,6 +199,29 @@
 
 #undef CONFIG_SYS_FLASH_CHECKSUM
 
+/*
+ * NAND FLASH
+ * drivers/mtd/nand/mpc5121_nfc.c (rev 2 silicon only)
+ */
+#define CONFIG_CMD_NAND                                        /* enable NAND support */
+#define CONFIG_JFFS2_NAND                              /* with JFFS2 on it */
+#define CONFIG_NAND_MPC5121_NFC
+#define CONFIG_SYS_NAND_BASE            0x40000000
+
+#define CONFIG_SYS_MAX_NAND_DEVICE      2
+#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_NAND_SELECT_DEVICE  /* driver supports mutipl. chips */
+
+#define        CONFIG_SYS_64BIT_VSPRINTF       /* needed for nand_util.c */
+
+/*
+ * Configuration parameters for MPC5121 NAND driver
+ */
+#define CONFIG_FSL_NFC_WIDTH 1
+#define CONFIG_FSL_NFC_WRITE_SIZE 2048
+#define CONFIG_FSL_NFC_SPARE_SIZE 64
+#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
 /*
  * CPLD registers area is really only 32 bytes in size, but the smallest possible LP
  * window is 64KB
@@ -222,7 +245,7 @@
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_BASE        TEXT_BASE               /* Start of monitor */
-#define CONFIG_SYS_MONITOR_LEN         (256 * 1024)            /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN         (512 * 1024)            /* Reserve 512 kB for Mon */
 #ifdef CONFIG_FSL_DIU_FB
 #define CONFIG_SYS_MALLOC_LEN          (6 * 1024 * 1024)       /* Reserved for malloc */
 #else
@@ -345,23 +368,52 @@
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
 #define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_EXT2
 #define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_DATE
+
 #undef CONFIG_CMD_FUSE
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_EXT2
 
 #if defined(CONFIG_PCI)
 #define CONFIG_CMD_PCI
 #endif
 
-#if defined(CONFIG_CMD_IDE)
+/*
+ * Dynamic MTD partition support
+ */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE              /* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
+#define MTDIDS_DEFAULT         "nor0=fc000000.flash,nand0=mpc5121.nand"
+
+/*
+ * NOR flash layout:
+ *
+ * FC000000 - FEABFFFF 42.75 MiB       User Data
+ * FEAC0000 - FFABFFFF  16 MiB         Root File System
+ * FFAC0000 - FFEBFFFF   4 MiB         Linux Kernel
+ * FFEC0000 - FFEFFFFF 256 KiB         Device Tree
+ * FFF00000 - FFFFFFFF   1 MiB         U-Boot (up to 512 KiB) and 2 x * env
+ *
+ * NAND flash layout: one big partition
+ */
+#define MTDPARTS_DEFAULT       "mtdparts=fc000000.flash:43776k(user)," \
+                                               "16m(rootfs),"          \
+                                               "4m(kernel),"           \
+                                               "256k(dtb),"            \
+                                               "1m(u-boot);"           \
+                                       "mpc5121.nand:-(data)"
+
+
+#if defined(CONFIG_CMD_IDE) || defined(CONFIG_CMD_EXT2)
 #define CONFIG_DOS_PARTITION
 #define CONFIG_MAC_PARTITION
 #define CONFIG_ISO_PARTITION
@@ -454,9 +506,9 @@
        "fdt_addr_r=880000\0"                                           \
        "ramdisk_addr_r=900000\0"                                       \
        "u-boot_addr=FFF00000\0"                                        \
-       "kernel_addr=FFC40000\0"                                        \
+       "kernel_addr=FFAC0000\0"                                        \
        "fdt_addr=FFEC0000\0"                                           \
-       "ramdisk_addr=FC040000\0"                                       \
+       "ramdisk_addr=FEAC0000\0"                                       \
        "ramdiskfile=mpc5121ads/uRamdisk\0"                             \
        "u-boot=mpc5121ads/u-boot.bin\0"                                \
        "bootfile=mpc5121ads/uImage\0"                                  \
@@ -519,7 +571,7 @@
 #define CONFIG_SYS_IDE_MAXDEVICE       2       /* max. 1 drive per IDE bus     */
 
 #define CONFIG_SYS_ATA_IDE0_OFFSET     0x0000
-#define CONFIG_SYS_ATA_BASE_ADDR       MPC512X_PATA
+#define CONFIG_SYS_ATA_BASE_ADDR       get_pata_base()
 
 /* Offset for data I/O                 RefMan MPC5121EE Table 28-10    */
 #define CONFIG_SYS_ATA_DATA_OFFSET     (0x00A0)
@@ -533,7 +585,7 @@
 /* Interval between registers  */
 #define CONFIG_SYS_ATA_STRIDE          4
 
-#define ATA_BASE_ADDR          MPC512X_PATA
+#define ATA_BASE_ADDR                  get_pata_base()
 
 /*
  * Control register bit definitions