/* uart */
#ifdef XILINX_UARTLITE_BASEADDR
-#define CONFIG_XILINX_UARTLITE
-#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
-#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
-#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
+ #define CONFIG_XILINX_UARTLITE
+ #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
+ #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
+ #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
+ #define CONSOLE_ARG "console=console=ttyUL0,115200\0"
#elif XILINX_UART16550_BASEADDR
-#define CONFIG_SYS_NS16550 1
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
-#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
-#define CONFIG_BAUDRATE 115200
-
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+ #define CONFIG_SYS_NS16550 1
+ #define CONFIG_SYS_NS16550_SERIAL
+ #define CONFIG_SYS_NS16550_REG_SIZE -4
+ #define CONFIG_CONS_INDEX 1
+ #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
+ #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
+ #define CONFIG_BAUDRATE 115200
+
+ /* The following table includes the supported baudrates */
+ #define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+ #define CONSOLE_ARG "console=console=ttyS0,115200\0"
#else
-#error Undefined uart
+ #error Undefined uart
#endif
/* setting reset address */
/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/
/* ethernet */
-#ifdef XILINX_EMAC_BASEADDR
-#define CONFIG_XILINX_EMAC 1
-#define CONFIG_SYS_ENET
-#else
#ifdef XILINX_EMACLITE_BASEADDR
-#define CONFIG_XILINX_EMACLITE 1
-#define CONFIG_SYS_ENET
-#endif
+ #define CONFIG_XILINX_EMACLITE 1
+ #define CONFIG_SYS_ENET
+#elif XILINX_LLTEMAC_BASEADDR
+ #define CONFIG_XILINX_LL_TEMAC 1
+ #define CONFIG_SYS_ENET
#endif
+
#undef ET_DEBUG
/* gpio */
#ifdef XILINX_GPIO_BASEADDR
-#define CONFIG_SYS_GPIO_0 1
-#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
+ #define CONFIG_SYS_GPIO_0 1
+ #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
#endif
/* interrupt controller */
#ifdef XILINX_INTC_BASEADDR
-#define CONFIG_SYS_INTC_0 1
-#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
-#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
+ #define CONFIG_SYS_INTC_0 1
+ #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
+ #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
#endif
/* timer */
#ifdef XILINX_TIMER_BASEADDR
-#if (XILINX_TIMER_IRQ != -1)
-#define CONFIG_SYS_TIMER_0 1
-#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
-#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
-#define FREQUENCE XILINX_CLOCK_FREQ
-#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
-#endif
-#else
-#ifdef XILINX_CLOCK_FREQ
-#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
+ #if (XILINX_TIMER_IRQ != -1)
+ #define CONFIG_SYS_TIMER_0 1
+ #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
+ #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
+ #define FREQUENCE XILINX_CLOCK_FREQ
+ #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
+ #endif
+#elif XILINX_CLOCK_FREQ
+ #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
#else
-#error BAD CLOCK FREQ
-#endif
+ #error BAD CLOCK FREQ
#endif
/* FSL */
/* #define CONFIG_SYS_FSL_2 */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
/* global pointer */
-#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size of global data */
/* start of global data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
/* monitor code */
#define SIZE 0x40000
-#define CONFIG_SYS_MONITOR_LEN SIZE
+#define CONFIG_SYS_MONITOR_LEN (SIZE - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_SYS_MALLOC_LEN SIZE
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
/* stack */
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE
/*#define RAMENV */
#define FLASH
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
- #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
#define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
#ifdef RAMENV
#else /* !RAMENV */
#define CONFIG_ENV_IS_IN_FLASH 1
- #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
+ #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
- #define CONFIG_ENV_SIZE 0x40000
+ #define CONFIG_ENV_SIZE 0x20000
#endif /* !RAMBOOT */
#else /* !FLASH */
/* ENV in RAM */
#define CONFIG_DOS_PARTITION
#endif
+#if defined(XILINX_USE_ICACHE)
+ #define CONFIG_ICACHE
+#else
+ #undef CONFIG_ICACHE
+#endif
+
+#if defined(XILINX_USE_DCACHE)
+ #define CONFIG_DCACHE
+#else
+ #undef CONFIG_DCACHE
+#endif
+
/*
* BOOTP options
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_CACHE
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL
+#define CONFIG_CMD_ECHO
+
+#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
+ #define CONFIG_CMD_CACHE
+#else
+ #undef CONFIG_CMD_CACHE
+#endif
#ifndef CONFIG_SYS_ENET
#undef CONFIG_CMD_NET
#define CONFIG_CMD_JFFS2
#if !defined(RAMENV)
- #define CONFIG_CMD_ENV
+ #define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_SAVES
#endif
#else
+ #undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_FLASH
+ #undef CONFIG_CMD_JFFS2
#endif
#if defined(CONFIG_CMD_JFFS2)
/* JFFS2 partitions */
-#define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */
+#define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT "nor0=ml401-0"
/* default mtd partition table */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */
-#define CONFIG_BOOTDELAY 30
+#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
#define CONFIG_BOOTARGS "root=romfs"
-#define CONFIG_HOSTNAME "ml401"
+#define CONFIG_HOSTNAME XILINX_BOARD_NAME
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
#define CONFIG_IPADDR 192.168.0.3
#define CONFIG_SERVERIP 192.168.0.5
#define CONFIG_SYS_USR_EXCEP /* user exception */
#define CONFIG_SYS_HZ 1000
-#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
+#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
"nor0=ml401-0\0"\
#define CONFIG_CMDLINE_EDITING
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#endif
+
#endif /* __CONFIG_H */