* [09:05] DRAM tRP:
* [04:00] DRAM tRPA
*/
-#ifdef CONFIG_ADS5121_REV2
-#define CONFIG_SYS_MDDRC_SYS_CFG 0xF8604A00
-#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xE8604A00
-#define CONFIG_SYS_MDDRC_TIME_CFG1 0x54EC1168
-#define CONFIG_SYS_MDDRC_TIME_CFG2 0x35210864
-#else
#define CONFIG_SYS_MDDRC_SYS_CFG 0xFA804A00
#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xEA804A00
#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168
#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864
-#endif
#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000
#define CONFIG_SYS_MDDRC_TIME_CFG0 0x00003D2E
#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN 0x06183D2E
/*
* NAND FLASH
- * drivers/mtd/nand/mpc5121_mpc.c (rev 2 silicon only)
+ * drivers/mtd/nand/mpc5121_nfc.c (rev 2 silicon only)
*/
#define CONFIG_CMD_NAND
#define CONFIG_NAND_MPC5121_NFC
#define CONFIG_HARD_I2C /* I2C with hardware support */
#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */