#endif
/* POST support */
-#define CONFIG_POST (CFG_POST_MEMORY | \
- CFG_POST_ECC_ON | \
+#define CONFIG_POST (CFG_POST_CACHE | \
CFG_POST_CPU | \
- CFG_POST_UART | \
- CFG_POST_I2C | \
- CFG_POST_CACHE | \
- CFG_POST_FPU | \
+ CFG_POST_ECC_ON | \
CFG_POST_ETHER | \
- CFG_POST_SPR)
+ CFG_POST_FPU | \
+ CFG_POST_I2C | \
+ CFG_POST_MEMORY | \
+ CFG_POST_RTC | \
+ CFG_POST_SPR | \
+ CFG_POST_UART)
#define CFG_POST_CACHE_ADDR 0x10000000 /* free virtual address */
#define CONFIG_LOGBUFFER
#define CFG_GPIO_PHY0_RST 22
#define CFG_GPIO_EEPROM_EXT_WP 55
#define CFG_GPIO_EEPROM_INT_WP 57
-#define CFG_GPIO_WATCHDOG 58
#define CFG_GPIO_LIME_S 59
#define CFG_GPIO_LIME_RST 60
+#define CFG_GPIO_WATCHDOG 63
/*-----------------------------------------------------------------------
* PPC440 GPIO Configuration