+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Freescale Semiconductor
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __LS2_SIMU_H
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
-#define CONFIG_SYS_MXC_I2C1_SPEED 40000000
-#define CONFIG_SYS_MXC_I2C2_SPEED 40000000
-
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR