/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2017 NXP
+ * Copyright 2017-2018 NXP
*/
#ifndef __LS1088_COMMON_H
#endif
#define CONFIG_REMAKE_ELF
-#define CONFIG_FSL_LAYERSCAPE
#include <asm/arch/stream_id_lsch3.h>
#include <asm/arch/config.h>
#include <asm/arch/soc.h>
+#define LS1088ARDB_PB_BOARD 0x4A
/* Link Definitions */
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
+#else
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
+#endif
/* Link Definitions */
-
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
+#else
#ifdef CONFIG_QSPI_BOOT
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_ADDR (CONFIG_SYS_FSL_QSPI_BASE + \
CONFIG_ENV_OFFSET)
#endif
+#endif
#define CONFIG_SKIP_LOWLEVEL_INIT
-#if !defined(CONFIG_SD_BOOT)
-#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
-#endif
-
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
*/
#if defined(CONFIG_FSL_MC_ENET)
-#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024)
+#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024)
#endif
/* Command line configuration */
#define CONFIG_CMD_CACHE
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_NR_DRAM_BANKS 2
-
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
"mcinitcmd=fsl_mc start mc 0x580a00000" \
" 0x580e00000 \0"
+#ifndef CONFIG_TFABOOT
#if defined(CONFIG_QSPI_BOOT)
#define CONFIG_BOOTCOMMAND "sf probe 0:0;" \
- "sf read 0x80200000 0xd00000 0x100000;"\
- " fsl_mc apply dpl 0x80200000 &&" \
+ "sf read 0x80001000 0xd00000 0x100000;"\
+ " fsl_mc lazyapply dpl 0x80001000 &&" \
" sf read $kernel_load $kernel_start" \
" $kernel_size && bootm $kernel_load"
#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80200000 0x6800 0x800;"\
- " fsl_mc apply dpl 0x80200000 &&" \
+#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80001000 0x6800 0x800;"\
+ " fsl_mc lazyapply dpl 0x80001000 &&" \
" mmc read $kernel_load $kernel_start" \
" $kernel_size && bootm $kernel_load"
#else /* NOR BOOT*/
-#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \
+#define CONFIG_BOOTCOMMAND "fsl_mc lazyapply dpl 0x580d00000 &&" \
" cp.b $kernel_start $kernel_load" \
" $kernel_size && bootm $kernel_load"
#endif
+#endif /* CONFIG_TFABOOT */
#endif
/* Monitor Command Prompt */
#define CONFIG_SPL_MAX_SIZE 0x16000
#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_TEXT_BASE 0x1800a000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
#define CONFIG_SYS_SPL_MALLOC_START 0x80200000