mx6_common: Do not select esdhc DDR mode for all boards
[oweals/u-boot.git] / include / configs / lager.h
index 9c89b162309c55f5654e24e22c85510c9ba4b98c..e830c6df0acdf64c1a3f45961ee9436b74a75505 100644 (file)
@@ -39,8 +39,6 @@
 
 /* SCIF */
 #define CONFIG_SCIF_CONSOLE
-#define CONFIG_CONS_SCIF0
-#define CONFIG_SCIF_USE_EXT_CLK
 
 /* SPI */
 #define CONFIG_SPI
@@ -83,7 +81,6 @@
 #define CONFIG_PLL1_DIV2_CLK_FREQ      (CONFIG_PLL1_CLK_FREQ / 2)
 #define CONFIG_MP_CLK_FREQ     (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
 #define CONFIG_HP_CLK_FREQ     (CONFIG_PLL1_CLK_FREQ / 12)
-#define CONFIG_SH_SCIF_CLK_FREQ        14745600 /* External Clock */
 
 #define CONFIG_SYS_TMU_CLK_DIV 4
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        3
 #define CONFIG_USB_STORAGE
 
+/* MMC */
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+
+#define CONFIG_SH_MMCIF
+#define CONFIG_SH_MMCIF_ADDR           0xEE220000
+#define CONFIG_SH_MMCIF_CLK            97500000
+
 /* Module stop status bits */
 /* INTC-RT */
 #define CONFIG_SMSTP0_ENA      0x00400000
 /* SCIF0 */
 #define CONFIG_SMSTP7_ENA      0x00200000
 
+/* SDHI */
+#define CONFIG_SH_SDHI_FREQ    97500000
+
 #endif /* __LAGER_H */