#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_DISPLAY_BOARDINFO
-
/* KMBEC FPGA (PRIO) */
#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000
#define CONFIG_SYS_KMBEC_FPGA_SIZE 64
#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
#ifdef CONFIG_KMCOGE5NE
/* BFTIC3: icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT6L (\
#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END
#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
-#define CONFIG_CMD_DIAG /* so that testpin is inquired for POST test */
#else
#define CONFIG_SYS_IBAT6L (0)