#define CONFIG_CMD_SF
#define CONFIG_SOFT_I2C /* I2C bit-banged */
+/* SPI NOR Flash default params, used by sf commands */
+#define CONFIG_SF_DEFAULT_SPEED 8100000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
+
+#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_MAX_HZ 8100000
+#define CONFIG_ENV_SPI_MODE SPI_MODE_3
+#endif
+
#include "asm/arch/config.h"
#define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */
#define CONFIG_KM_DEF_ENV_CPU \
"boot=bootm ${load_addr_r} - -\0" \
"cramfsloadfdt=true\0" \
- "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
+ "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
CONFIG_KM_UPDATE_UBOOT \
""
#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
#define CONFIG_NR_DRAM_BANKS 4
-#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
/*
int get_scl(void);
#define KM_KIRKWOOD_SDA_PIN 8
#define KM_KIRKWOOD_SCL_PIN 9
+#define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300
#define KM_KIRKWOOD_ENV_WP 38
#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
/*
* Environment variables configurations
*/
+#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
+#define CONFIG_ENV_IS_IN_SPI_FLASH /* use SPI-Flash for environment vars */
+#define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */
+#define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
+ CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */
+#else
#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0"
-
-/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+#endif
+
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
+/* SPI bus claim MPP configuration */
+#define CONFIG_SYS_KW_SPI_MPP 0x0
+
#define FLASH_GPIO_PIN 0x00010000
+#define KM_FLASH_GPIO_PIN 16
#ifndef MTDIDS_DEFAULT
# define MTDIDS_DEFAULT "nand0=orion_nand"
#define CONFIG_KM_UPDATE_UBOOT \
"update=" \
- "spi on;sf probe 0;sf erase 0 +${filesize};" \
- "sf write ${load_addr_r} 0 ${filesize};" \
- "spi off\0"
+ "sf probe 0;sf erase 0 +${filesize};" \
+ "sf write ${load_addr_r} 0 ${filesize};\0"
+
+#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
+#define CONFIG_KM_NEW_ENV \
+ "newenv=sf probe 0;" \
+ "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \
+ __stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
+#else
+#define CONFIG_KM_NEW_ENV \
+ "newenv=setenv addr 0x100000 && " \
+ "i2c dev 1; mw.b ${addr} 0 4 && " \
+ "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \
+ "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
+#endif
/*
* Default environment variables
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_KM_DEF_ENV \
- "newenv=setenv addr 0x100000 && " \
- "i2c dev 1; mw.b ${addr} 0 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
+ CONFIG_KM_NEW_ENV \
"arch=arm\0" \
"EEprom_ivm=" KM_IVM_BUS "\0" \
""
#define CONFIG_KM_RESERVED_PRAM 0x801000
/* address for the bootcount (taken from end of RAM) */
#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
+/* Use generic bootcount RAM driver */
+#define CONFIG_BOOTCOUNT_RAM
/* enable POST tests */
#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
#define CONFIG_POST_EXTERNAL_WORD_FUNCS
#define CONFIG_CMD_DIAG
+/* we do the whole PCIe FPGA config stuff here */
+#define BOARD_LATE_INIT
+
#endif /* _CONFIG_KM_ARM_H */