Convert CONFIG_SYS_CONSOLE_INFO_QUIET to Kconfig
[oweals/u-boot.git] / include / configs / hrcon.h
index 16d5885e3797a7c894ec1cf390b512c38a96bea4..c2ffc081478e2a6630dce4fdde92cecfff273a5e 100644 (file)
 
 #define        CONFIG_SYS_TEXT_BASE    0xFE000000
 
-#ifdef CONFIG_HRCON_DH
-#define CONFIG_IDENT_STRING    " hrcon dh 0.01"
-#else
-#define CONFIG_IDENT_STRING    " hrcon 0.01"
-#endif
-
-
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_LAST_STAGE_INIT
 
-/* new uImage format support */
-#define CONFIG_FIT                     1
-#define CONFIG_FIT_VERBOSE             1
-
 #define CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 
-#define CONFIG_CMD_MMC
 #define CONFIG_GENERIC_MMC
 #define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_EXT2
 
 #define CONFIG_CMD_FPGAD
 #define CONFIG_CMD_IOLOOP
  * Serial Port
  */
 #define CONFIG_CONS_INDEX      2
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
 #define CONFIG_SYS_NS16550_COM1        (CONFIG_SYS_IMMR + 0x4500)
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_IMMR + 0x4600)
 
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-
 /* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT               1
-#define CONFIG_OF_BOARD_SETUP          1
-#define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
 /* I2C */
 #define CONFIG_SYS_I2C
 #define I2C_SOFT_DECLARATIONS4
 #define CONFIG_SYS_I2C_SOFT_SPEED_4            50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE_4            0x7F
-
-#ifdef CONFIG_HRCON_DH
 #define I2C_SOFT_DECLARATIONS5
 #define CONFIG_SYS_I2C_SOFT_SPEED_5            50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE_5            0x7F
 #define I2C_SOFT_DECLARATIONS8
 #define CONFIG_SYS_I2C_SOFT_SPEED_8            50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE_8            0x7F
+
+#ifdef CONFIG_HRCON_DH
+#define I2C_SOFT_DECLARATIONS9
+#define CONFIG_SYS_I2C_SOFT_SPEED_9            50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_9            0x7F
+#define I2C_SOFT_DECLARATIONS10
+#define CONFIG_SYS_I2C_SOFT_SPEED_10           50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_10           0x7F
+#define I2C_SOFT_DECLARATIONS11
+#define CONFIG_SYS_I2C_SOFT_SPEED_11           50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_11           0x7F
+#define I2C_SOFT_DECLARATIONS12
+#define CONFIG_SYS_I2C_SOFT_SPEED_12           50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_12           0x7F
 #endif
 
 #ifdef CONFIG_HRCON_DH
-#define CONFIG_SYS_ICS8N3QV01_I2C              {9, 10, 11, 12, 13, 14, 15, 16}
+#define CONFIG_SYS_ICS8N3QV01_I2C              {13, 14, 15, 16, 17, 18, 19, 20}
 #define CONFIG_SYS_DP501_I2C                   {1, 3, 5, 7, 2, 4, 6, 8}
+#define CONFIG_HRCON_FANS                      { {10, 0x4c}, {11, 0x4c}, \
+                                                 {12, 0x4c} }
 #else
-#define CONFIG_SYS_ICS8N3QV01_I2C              {5, 6, 7, 8}
+#define CONFIG_SYS_ICS8N3QV01_I2C              {9, 10, 11, 12}
 #define CONFIG_SYS_DP501_I2C                   {1, 2, 3, 4}
+#define CONFIG_HRCON_FANS                      { {6, 0x4c}, {7, 0x4c}, \
+                                                 {8, 0x4c} }
 #endif
 
 #ifndef __ASSEMBLY__
@@ -410,33 +406,37 @@ void fpga_control_set(unsigned int bus, int pin);
 void fpga_control_clear(unsigned int bus, int pin);
 #endif
 
+#define I2C_SDA_GPIO   ((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
+#define I2C_SCL_GPIO   ((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
+#define I2C_FPGA_IDX   (I2C_ADAP_HWNR % 4)
+
 #ifdef CONFIG_HRCON_DH
 #define I2C_ACTIVE \
        do { \
-               if (I2C_ADAP_HWNR > 3) \
-                       fpga_control_set(I2C_ADAP_HWNR, 0x0004); \
+               if (I2C_ADAP_HWNR > 7) \
+                       fpga_control_set(I2C_FPGA_IDX, 0x0004); \
                else \
-                       fpga_control_clear(I2C_ADAP_HWNR, 0x0004); \
+                       fpga_control_clear(I2C_FPGA_IDX, 0x0004); \
        } while (0)
 #else
 #define I2C_ACTIVE     { }
 #endif
 #define I2C_TRISTATE   { }
 #define I2C_READ \
-       (fpga_gpio_get(I2C_ADAP_HWNR, 0x0040) ? 1 : 0)
+       (fpga_gpio_get(I2C_FPGA_IDX, I2C_SDA_GPIO) ? 1 : 0)
 #define I2C_SDA(bit) \
        do { \
                if (bit) \
-                       fpga_gpio_set(I2C_ADAP_HWNR, 0x0040); \
+                       fpga_gpio_set(I2C_FPGA_IDX, I2C_SDA_GPIO); \
                else \
-                       fpga_gpio_clear(I2C_ADAP_HWNR, 0x0040); \
+                       fpga_gpio_clear(I2C_FPGA_IDX, I2C_SDA_GPIO); \
        } while (0)
 #define I2C_SCL(bit) \
        do { \
                if (bit) \
-                       fpga_gpio_set(I2C_ADAP_HWNR, 0x0020); \
+                       fpga_gpio_set(I2C_FPGA_IDX, I2C_SCL_GPIO); \
                else \
-                       fpga_gpio_clear(I2C_ADAP_HWNR, 0x0020); \
+                       fpga_gpio_clear(I2C_FPGA_IDX, I2C_SCL_GPIO); \
        } while (0)
 #define I2C_DELAY      udelay(25)      /* 1/4 I2C clock duration */
 
@@ -525,10 +525,7 @@ void fpga_control_clear(unsigned int bus, int pin);
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
 #define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
 
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history */
 #define CONFIG_AUTO_COMPLETE           /* add autocompletion support */
@@ -540,12 +537,8 @@ void fpga_control_clear(unsigned int bus, int pin);
 #define CONFIG_SYS_LOAD_ADDR           0x2000000 /* default load address */
 #define CONFIG_SYS_HZ          1000    /* decrementer freq: 1ms ticks */
 
-#undef CONFIG_ZERO_BOOTDELAY_CHECK     /* ignore keypress on bootdelay==0 */
-
 #define CONFIG_SYS_CBSIZE      1024 /* Console I/O Buffer Size */
 
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_MAXARGS     16      /* max number of command args */
@@ -618,7 +611,6 @@ void fpga_control_clear(unsigned int bus, int pin);
 
 #define CONFIG_LOADADDR        800000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 
 #define CONFIG_HOSTNAME                hrcon
 #define CONFIG_ROOTPATH                "/opt/nfsroot"
@@ -658,5 +650,4 @@ void fpga_control_clear(unsigned int bus, int pin);
 
 #define CONFIG_BOOTCOMMAND             CONFIG_MMCBOOTCOMMAND
 
-
 #endif /* __CONFIG_H */