Merge tag 'efi-2020-01-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

[oweals/u-boot.git] / include / configs / da850evm.h

diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 14a6b9e5910a6d2297f87038503ee764b20004b2..6876134a00cb6187b840357a20a641fb7c9d53a2 100644 (file)
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -18,16 +18,6 @@
 #define CONFIG_USE_SPIFLASH
 #endif
 
-/*
-* Disable DM_* for SPL build and can be re-enabled after adding
-* DM support in SPL
-*/
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_DM_SPI
-#undef CONFIG_DM_SPI_FLASH
-#undef CONFIG_DM_I2C
-#undef CONFIG_DM_I2C_COMPAT
-#endif
 /*
  * SoC Configuration
  */
@@ -36,10 +26,9 @@
 #define CONFIG_SYS_OSCIN_FREQ          24000000
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 
 #ifdef CONFIG_DIRECT_NOR_BOOT
-#define CONFIG_ARCH_CPU_INIT
 #define CONFIG_SYS_DV_NOR_BOOT_CFG     (0x11)
 #endif
 
@@ -50,7 +39,8 @@
 #define PHYS_SDRAM_1           DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
 #define PHYS_SDRAM_1_SIZE      (64 << 20) /* SDRAM size 64MB */
 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
-
+#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE
+#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000
 /* memtest start addr */
 #define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1 + 0x2000000)
 
@@ -115,23 +105,11 @@
 /*
  * Serial Driver info
  */
-
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_DIRECT_NOR_BOOT)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size */
-#define CONFIG_SYS_NS16550_COM1        DAVINCI_UART2_BASE /* Base address of UART2 */
-#endif
 #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
 
 #define CONFIG_SYS_SPI_CLK             clk_get(DAVINCI_SPI1_CLKID)
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_SPI_BASE            DAVINCI_SPI1_BASE
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
-#endif
 
 #ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x8000
 #define CONFIG_SYS_SPI_U_BOOT_SIZE     0x40000
 #endif
 
@@ -151,7 +129,6 @@
 #define CONFIG_ENV_SIZE                        (128 << 10)
 #define CONFIG_ENV_SECT_SIZE   (128 << 10)
 #endif
-#define        CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define        CONFIG_SYS_NAND_PAGE_2K
 #define CONFIG_SYS_NAND_CS             3
@@ -186,6 +163,10 @@
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
 #define CONFIG_SPL_NAND_LOAD
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NAND_SELF_INIT
+#endif
 #endif
 
 /*
@@ -198,12 +179,9 @@
 #endif
 
 #ifdef CONFIG_USE_NOR
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_PROTECTION
 #define CONFIG_SYS_MAX_FLASH_BANKS     1 /* max number of flash banks */
 #define CONFIG_SYS_FLASH_SECT_SZ       (128 << 10) /* 128KB */
-#define CONFIG_ENV_OFFSET              (CONFIG_SYS_FLASH_SECT_SZ * 3)
+#define CONFIG_ENV_OFFSET              (SZ_1M)
 #define CONFIG_ENV_SIZE                        (10 << 10) /* 10KB */
 #define CONFIG_SYS_FLASH_BASE          DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
 #define PHYS_FLASH_SIZE                        (8 << 20) /* Flash size 8MB */
@@ -212,16 +190,11 @@
 #define CONFIG_ENV_SECT_SIZE           CONFIG_SYS_FLASH_SECT_SZ
 #endif
 
-#ifdef CONFIG_USE_SPIFLASH
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#if defined(CONFIG_USE_SPIFLASH) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 #define CONFIG_ENV_SIZE                        (64 << 10)
 #define CONFIG_ENV_OFFSET              (512 << 10)
 #define CONFIG_ENV_SECT_SIZE   (64 << 10)
 #endif
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_SPI_FLASH_MTD
-#endif
-#endif
 
 /*
  * U-Boot general configuration
@@ -230,7 +203,6 @@
 #define CONFIG_SYS_CBSIZE      1024 /* Console I/O Buffer Size */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
 #define CONFIG_SYS_LOAD_ADDR   (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_MX_CYCLIC
 
 /*
  * Linux Information
@@ -274,13 +246,16 @@
 #define CONFIG_ENV_SIZE                (16 << 10)
 #endif
 
+/* USB Configs */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     15
+
 #ifndef CONFIG_DIRECT_NOR_BOOT
 /* defines for SPL */
 #define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_TEXT_BASE - \
                                                CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_SPL_MALLOC_SIZE     CONFIG_SYS_MALLOC_LEN
 #define CONFIG_SPL_STACK       0x8001ff00
-#define CONFIG_SPL_TEXT_BASE   0x80000000
 #define CONFIG_SPL_MAX_FOOTPRINT       32768
 #define CONFIG_SPL_PAD_TO      32768
 #endif