powerpc/85xx: Fix NAND SPL support

[oweals/u-boot.git] / include / configs / csb226.h

diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index ae05734a09eb04b14e1852575900b3818f18c89e..804469bf857174205ccea8874de9de198d39038f 100644 (file)
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -44,8 +44,8 @@
                                        /* for timer/console/ethernet       */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
-
+#define CONFIG_SYS_DCACHE_OFF
+#define        CONFIG_SYS_TEXT_BASE    0x0
 /*
  * Hardware drivers
  */
@@ -117,7 +117,6 @@
  *
  */
 #define CONFIG_SYS_MALLOC_LEN          (128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* size in bytes reserved for initial data */
 
 #define CONFIG_SYS_LONGHELP                            /* undef to save memory         */
 #define CONFIG_SYS_PROMPT              "uboot> "       /* Monitor Command Prompt       */
@@ -142,7 +141,7 @@
                                                /*    ^^      Run Mode Speed = 2x Mem Speed  */
                                                /* ^^         Turbo Mode Sp. = 1x Run M. Sp. */
 
-#define CONFIG_SYS_MONITOR_LEN         0x20000         /* 128 KiB */
+#define CONFIG_SYS_MONITOR_LEN         0x1c000         /* 112 KiB */
 
                                                /* valid baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
@@ -150,7 +149,6 @@
 /*
  * Network chip
  */
-#define CONFIG_NET_MULTI
 #define CONFIG_CS8900
 #define CONFIG_CS8900_BUS32
 #define CONFIG_CS8900_BASE     0x08000000
@@ -182,7 +180,7 @@
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
-#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+#define        CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
 
 # if 0
 /* FIXME: switch to _documented_ registers */
@@ -458,6 +456,9 @@
 
 #define CONFIG_SYS_PSSR_VAL        0x20
 
+#define        CONFIG_SYS_CCCR                 CCCR_L27|CCCR_M2|CCCR_N10
+#define        CONFIG_SYS_CKEN                 0x0
+
 /*
  * Memory settings
  */
@@ -468,6 +469,8 @@
 #define CONFIG_SYS_MDCNFG_VAL          0x09a909a9
 #define CONFIG_SYS_MDREFR_VAL          0x038ff030
 #define CONFIG_SYS_MDMRS_VAL           0x00220022
+#define        CONFIG_SYS_FLYCNFG_VAL          0x00000000
+#define        CONFIG_SYS_SXCNFG_VAL           0x00000000
 
 /*
  * PCMCIA and CF Interfaces