arm: omap3: Add SPL support to cm_t35

[oweals/u-boot.git] / include / configs / cm_t35.h

diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index bc5b66c6dc7c2ec668c7f2e00a86df8a98d47ade..29178199155d5f75a00868341796260557fd8c13 100644 (file)
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -23,11 +23,10 @@
 #define CONFIG_OMAP    /* in a TI OMAP core */
 #define CONFIG_OMAP34XX        /* which is a 34XX */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_CMD_GPIO
 #define CONFIG_CM_T3X  /* working with CM-T35 and CM-T3730 */
 #define CONFIG_OMAP_COMMON
 
-#define CONFIG_SYS_TEXT_BASE   0x80008000
-
 #define CONFIG_SDRC    /* The chip has SDRC controller */
 
 #include <asm/arch/cpu.h>              /* get chip and board defs */
@@ -140,10 +139,10 @@
 #undef CONFIG_CMD_IMLS         /* List all found images        */
 
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED           100000
-#define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_DRIVER_OMAP34XX_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_OMAP24_I2C_SPEED    100000
+#define CONFIG_SYS_OMAP24_I2C_SLAVE    1
+#define CONFIG_SYS_I2C_OMAP34XX
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_I2C_MULTI_BUS
@@ -169,7 +168,7 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 /* Environment information */
-#define CONFIG_BOOTDELAY               10
+#define CONFIG_BOOTDELAY               3
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -258,7 +257,6 @@
  */
 #define CONFIG_SYS_TIMERBASE           (OMAP34XX_GPT2)
 #define CONFIG_SYS_PTV                 2       /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ                  1000
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map
@@ -302,12 +300,13 @@
 /* Status LED */
 #define CONFIG_STATUS_LED              /* Status LED enabled */
 #define CONFIG_BOARD_SPECIFIC_LED
-#define STATUS_LED_GREEN               0
-#define STATUS_LED_BIT                 STATUS_LED_GREEN
+#define CONFIG_GPIO_LED
+#define GREEN_LED_GPIO                 186 /* CM-T35 Green LED is GPIO186 */
+#define GREEN_LED_DEV                  0
+#define STATUS_LED_BIT                 GREEN_LED_GPIO
 #define STATUS_LED_STATE               STATUS_LED_ON
 #define STATUS_LED_PERIOD              (CONFIG_SYS_HZ / 2)
-#define STATUS_LED_BOOT                        STATUS_LED_BIT
-#define GREEN_LED_GPIO                 186 /* CM-T35 Green LED is GPIO186 */
+#define STATUS_LED_BOOT                        GREEN_LED_DEV
 
 #define CONFIG_SPLASHIMAGE_GUARD
 
@@ -325,5 +324,71 @@
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_CMD_BMP
 #define CONFIG_BMP_16BPP
+#define CONFIG_SCF0403_LCD
+
+#define CONFIG_OMAP3_SPI
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_NAND_SIMPLE
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS     0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION   1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME       "u-boot.img"
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT     64
+#define CONFIG_SYS_NAND_PAGE_SIZE      2048
+#define CONFIG_SYS_NAND_OOBSIZE                64
+#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
+/*
+ * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
+ * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
+ */
+#define CONFIG_SYS_NAND_ECCPOS         { 1, 2, 3, 4, 5, 6, 7, 8, 9, \
+                                        10, 11, 12 }
+#define CONFIG_SYS_NAND_ECCSIZE                512
+#define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
+
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+
+#define CONFIG_SPL_TEXT_BASE           0x40200800
+#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
+
+/*
+ * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
+ * older x-loader implementations. And move the BSS area so that it
+ * doesn't overlap with TEXT_BASE.
+ */
+#define CONFIG_SYS_TEXT_BASE           0x80008000
+#define CONFIG_SPL_BSS_START_ADDR      0x80100000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */
+
+#define CONFIG_SYS_SPL_MALLOC_START    0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
 
 #endif /* __CONFIG_H */