arm: maxbcm: Enable SPL to include DDR training code into U-Boot

[oweals/u-boot.git] / include / configs / cm-bf548.h

diff --git a/include/configs/cm-bf548.h b/include/configs/cm-bf548.h
index 3c9eeb58a39f536fff57e8193c62c163919c0842..72eafc5699b57f5dc578fad441a733f4a66b21e5 100644 (file)
--- a/include/configs/cm-bf548.h
+++ b/include/configs/cm-bf548.h
@@ -104,8 +104,8 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C    1
-#define CONFIG_HARD_I2C                1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_ADI
 
 
 /*
@@ -118,6 +118,8 @@
 #define CONFIG_BOOTCOMMAND     "run flashboot"
 #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0"
 
+#define CONFIG_ADI_GPIO2
+
 #ifndef __ADSPBF542__
 /* Don't waste time transferring a logo over the UART */
 # if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)