arm: maxbcm: Enable SPL to include DDR training code into U-Boot

[oweals/u-boot.git] / include / configs / cm-bf548.h

diff --git a/include/configs/cm-bf548.h b/include/configs/cm-bf548.h
index 346e27f3ebd83a6722b09fccc563ceb0e03aefa3..72eafc5699b57f5dc578fad441a733f4a66b21e5 100644 (file)
--- a/include/configs/cm-bf548.h
+++ b/include/configs/cm-bf548.h
@@ -104,8 +104,8 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C    1
-#define CONFIG_HARD_I2C                1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_ADI
 
 
 /*
@@ -117,7 +117,6 @@
 #define CONFIG_UART_CONSOLE    1
 #define CONFIG_BOOTCOMMAND     "run flashboot"
 #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0"
-#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED
 
 #define CONFIG_ADI_GPIO2