#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
-#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
+#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
#define CONFIG_BOARD_EARLY_INIT_R
+#define CONFIG_HIGH_BATS 1 /* High BATs supported */
+
/*
* Serial console configuration
*/
#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IMMAP | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP )
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+
/*
* MUST be low boot - HIGHBOOT is not supported anymore
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_PREBOOT "echo;" \
- "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
"echo"
#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$(serverip):$(rootpath)\0" \
+ "nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip=setenv bootargs $(bootargs) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
- ":$(hostname):$(netdev):off panic=1\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
- "bootm $(kernel_addr)\0" \
+ "bootm ${kernel_addr}\0" \
"flash_self=run ramargs addip;" \
- "bootm $(kernel_addr) $(ramdisk_addr)\0" \
- "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
"bootfile=/tftpboot/canmb/uImage\0" \
""
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* Flash configuration, expect one 16 Megabyte Bank at most
#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
-#define CFG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI
#define CFG_FLASH_EMPTY_INFO
-/*
- * DRAM configuration
- */
-#define CFG_DRAM_DDR 0
-#define CFG_DRAM_EMODE 0
-#define CFG_DRAM_MODE 0x00CD
-#define CFG_DRAM_CONTROL 0x514F0000
-#define CFG_DRAM_CONFIG1 0xD2333A00
-#define CFG_DRAM_CONFIG2 0x8AD70004
-#define CFG_DRAM_TAP_DEL 0x08
-#define CFG_DRAM_RAM_SIZE 0x19
-
/*
* Environment settings
*/
* Ethernet configuration
*/
#define CONFIG_MPC5xxx_FEC 1
-#define CONFIG_PHY_ADDR 0x1
+#define CONFIG_PHY_ADDR 0x0
/*
* GPIO configuration:
* PSC1,2,3 predefined as UART
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/