(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* DataFlash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED 30000000
-#endif
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
#endif
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC 1
-#define CONFIG_ATMEL_NAND_HW_PMECC 1
-#define CONFIG_PMECC_CAP 2
-#define CONFIG_PMECC_SECTOR_SIZE 512
-
/* USB */
#ifdef CONFIG_CMD_USB
#ifndef CONFIG_USB_EHCI_HCD
#define CONFIG_ENV_OFFSET 0x5000
#define CONFIG_ENV_SIZE 0x3000
#define CONFIG_ENV_SECT_SIZE 0x1000
-#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x100000 0x300000; " \
"bootm 0x22000000"
#define CONFIG_ENV_OFFSET 0x4200
#define CONFIG_ENV_SIZE 0x4200
#define CONFIG_ENV_SECT_SIZE 0x210
-#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
/* SPL */
-#define CONFIG_SPL_TEXT_BASE 0x300000
#define CONFIG_SPL_MAX_SIZE 0x6000
#define CONFIG_SPL_STACK 0x308000
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#endif