at91: Add support for taskit AT91SAM9G20 boards.
[oweals/u-boot.git] / include / configs / astro_mcf5373l.h
index f2bc26aab818adea5b541a3d322c380d8833a593..5c4cac937df99fb66660ff0b71f07483d031f7db 100644 (file)
 #define CONFIG_CMDLINE_EDITING
 
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 
 #define CONFIG_MCFRTC
 #undef RTC_DEBUG
  */
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
 
 #define CONFIG_MCFUART
 #define CONFIG_SYS_UART_PORT           (2)
  * Definitions for initial stack pointer and data area (in internal SRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x80000000
-#define CONFIG_SYS_INIT_RAM_END                0x8000
+#define CONFIG_SYS_INIT_RAM_SIZE               0x8000
 #define CONFIG_SYS_INIT_RAM_CTRL       0x221
-#define CONFIG_SYS_GBL_DATA_SIZE       128
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - \
-                                        CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - \
+                                        GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
 #define CONFIG_SYS_CACHELINE_SIZE      16
 
 #define ICACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
-                                        CONFIG_SYS_INIT_RAM_END - 8)
+                                        CONFIG_SYS_INIT_RAM_SIZE - 8)
 #define DCACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
-                                        CONFIG_SYS_INIT_RAM_END - 4)
+                                        CONFIG_SYS_INIT_RAM_SIZE - 4)
 #define CONFIG_SYS_ICACHE_INV          (CF_CACR_CINVA)
 #define CONFIG_SYS_CACHE_ACR0          (CONFIG_SYS_SDRAM_BASE | \
                                         CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \