mx6_common: Do not select esdhc DDR mode for all boards

[oweals/u-boot.git] / include / configs / apf27.h

diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 6fd48181f1099edc676568f63d3b1c039b897e9a..403692d51702f5be822a4e495bedf1ae18d29d77 100644 (file)
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -18,8 +18,7 @@
 /*
  * SoC configurations
  */
-#define CONFIG_ARM926EJS               /* this is an ARM926EJS CPU */
-#define CONFIG_MX27                    /* in a Freescale i.MX27 Chip */
+#define CONFIG_MX27                    /* This is a Freescale i.MX27 Chip */
 #define CONFIG_MACH_TYPE       1698    /* APF27 */
 #define CONFIG_SYS_GENERIC_BOARD
 
@@ -37,7 +36,6 @@
 /*
  * SPL
  */
-#define CONFIG_SPL
 #define CONFIG_SPL_TARGET      "u-boot-with-spl.bin"
 #define CONFIG_SPL_LDSCRIPT    "arch/$(ARCH)/cpu/u-boot-spl.lds"
 #define CONFIG_SPL_MAX_SIZE    2048
@@ -292,6 +290,20 @@
 #define CONFIG_FEC_MXC_PHYADDR         0x1f
 #define CONFIG_MII                             /* MII PHY management   */
 
+/*
+ * FPGA
+ */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_FPGA
+#endif
+#define CONFIG_FPGA_COUNT              1
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_SPARTAN3
+#define CONFIG_SYS_FPGA_WAIT           250 /* 250 ms */
+#define CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_SYS_FPGA_CHECK_CTRLC
+#define CONFIG_SYS_FPGA_CHECK_ERROR
+
 /*
  * Fuses - IIM
  */
@@ -307,11 +319,12 @@
  */
 
 #ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE            IMX_I2C1_BASE
-#define CONFIG_SYS_I2C_SPEED           100000  /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_MXC_I2C1_SPEED      100000  /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C1_SLAVE      0x7F
+#define CONFIG_SYS_MXC_I2C2_SPEED      100000  /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C2_SLAVE      0x7F
 #define CONFIG_SYS_I2C_NOPROBES                { }
 
 #ifdef CONFIG_CMD_EEPROM
@@ -340,11 +353,6 @@
 #define CONFIG_SYS_RTC_BUS_NUM         0
 #endif /* CONFIG_CMD_DATE */
 
-/*
- * Clocks
- */
-#define        CONFIG_SYS_HZ                   1000    /* Ticks per second */
-
 /*
  * PLL
  *