MX51: vision2: Fix build for vision2 board.
[oweals/u-boot.git] / include / configs / actux2.h
index 7e6e8f28248768d3b1aabf63a94b830ea9cfa5a4..8ab3b1993339604dd1a127903bb2ab1d2b81fb18 100644 (file)
@@ -32,6 +32,7 @@
 #define CONFIG_DISPLAY_CPUINFO         1
 #define CONFIG_DISPLAY_BOARDINFO       1
 
+#define CONFIG_IXP_SERIAL
 #define CONFIG_SYS_IXP425_CONSOLE              IXP425_UART2
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_BOOTDELAY               5
@@ -44,8 +45,6 @@
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN                  (CONFIG_ENV_SIZE + 128*1024)
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE               128
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
@@ -85,8 +84,6 @@
 #define CONFIG_SYS_MEMTEST_START               0x00400000
 #define CONFIG_SYS_MEMTEST_END                 0x00800000
 
-/* everything, incl board info, in Hz */
-#undef  CONFIG_SYS_CLKS_IN_HZ
 /* spec says 66.666 MHz, but it appears to be 33 */
 #define CONFIG_SYS_HZ                          3333333
 
 
 /* include IXP4xx NPE support */
 #define CONFIG_IXP4XX_NPE              1
-/* use separate flash sector with ucode images */
-#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE       0x50040000
 #define CONFIG_NET_MULTI               1
 /* NPE0 PHY address */
 #define        CONFIG_PHY_ADDR                 0x00
 #define CONFIG_SYS_USE_PPCENV                  1
 
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \
+       "npe_ucode=50040000\0"                                          \
        "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
        "kerneladdr=50050000\0"                                         \
        "rootaddr=50170000\0"                                           \