include/configs: Use new CONFIG_CMD_* in various [v-z]* named board config files.

[oweals/u-boot.git] / include / configs / W7OLMC.h

diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h
index 1b867e056d3540082651f7d503c9b37724c01f49..8dc623ea069c6899e5ea59e8096a8274c2968480 100644 (file)
--- a/include/configs/W7OLMC.h
+++ b/include/configs/W7OLMC.h
@@ -38,7 +38,8 @@
 #define CONFIG_W7O             1               /* ...on a Wave 7 Optics board  */
 #define CONFIG_W7OLMC          1               /* ...specifically an LMC       */
 
-#define CONFIG_BOARD_PRE_INIT  1               /* Call board_pre_init  */
+#define CONFIG_BOARD_EARLY_INIT_F 1            /* Call board_early_init_f      */
+#define        CONFIG_MISC_INIT_F      1               /* and misc_init_f()            */
 
 #define CONFIG_SYS_CLK_FREQ    33333333        /* external frequency to pll    */
 
@@ -81,7 +82,7 @@
 #define CONFIG_HW_WATCHDOG                     /* HW Watchdog, board specific  */
 
 #define        CONFIG_SPD_EEPROM                       /* SPD EEPROM for SDRAM param.  */
-
+#define CONFIG_SPDDRAM_SILENT                  /* No output if spd fails       */
 /*
  * Miscellaneous configurable options
  */
@@ -274,7 +275,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                8192            /* For IBM 405 CPUs                     */
+#define CFG_DCACHE_SIZE                8192            /* For AMCC 405 CPUs                    */
 #define CFG_CACHELINE_SIZE     32              /* ...          */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5               /* log base 2 of the above val. */
@@ -323,4 +324,3 @@
 #define CONFIG_FPGAS_BANK_SIZE 0x00100000L     /* FPGAs' mmap bank size        */
 
 #endif /* __CONFIG_H */
-