NAND finally working. Two bugs fixed:

[oweals/u-boot.git] / include / configs / TQM834x.h

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 96a1ad28fc96bae560fd62cbd74cc321ac58af5a..41f44c5a37c977eb84009e3c3490910fc7f6089b 100644 (file)
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -95,14 +95,14 @@
  * When CFG_MAX_FLASH_BANKS_DETECT is defined, the actual number of Flash
  * banks has to be determined at runtime and stored in a gloabl variable
  * tqm834x_num_flash_banks. The value of CFG_MAX_FLASH_BANKS_DETECT is only
- * used insted of CFG_MAX_FLASH_BANKS to allocate the array flash_info, and
+ * used instead of CFG_MAX_FLASH_BANKS to allocate the array flash_info, and
  * should be made sufficiently large to accomodate the number of banks that
- * might acutally be detected.  Since most (all?) Flash related functions use
+ * might actually be detected.  Since most (all?) Flash related functions use
  * CFG_MAX_FLASH_BANKS as the number of actual banks on the board, it is
  * defined as tqm834x_num_flash_banks.
  */
 #define CFG_MAX_FLASH_BANKS_DETECT     2
-#ifndef __ASSEMBLY__ 
+#ifndef __ASSEMBLY__
 extern int tqm834x_num_flash_banks;
 #endif
 #define CFG_MAX_FLASH_BANKS (tqm834x_num_flash_banks)
@@ -122,6 +122,7 @@ extern int tqm834x_num_flash_banks;
 #define CFG_OR0_PRELIM         (CFG_PRELIM_OR_AM  | CFG_OR_TIMING_FLASH)
 
 #define CFG_LBLAWAR0_PRELIM    0x8000001D      /* 1 GiB window size (2^(size + 1)) */
+
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE  /* Window base at flash base */
 
 /* disable remaining mappings */
@@ -241,14 +242,14 @@ extern int tqm834x_num_flash_banks;
 #if defined(CONFIG_TSEC_ENET)
 
 #ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI               1
+#define CONFIG_NET_MULTI
 #endif
 
 #define CONFIG_MPC83XX_TSEC1           1
 #define CONFIG_MPC83XX_TSEC1_NAME      "TSEC0"
 #define CONFIG_MPC83XX_TSEC2           1
 #define CONFIG_MPC83XX_TSEC2_NAME      "TSEC1"
-#define TSEC1_PHY_ADDR                 0
+#define TSEC1_PHY_ADDR                 2
 #define TSEC2_PHY_ADDR                 1
 #define TSEC1_PHYIDX                   0
 #define TSEC2_PHYIDX                   0
@@ -262,45 +263,33 @@ extern int tqm834x_num_flash_banks;
  * General PCI
  * Addresses are mapped 1-1.
  */
-/* FIXME: Real PCI support will come in a follow-up update. */
-#undef CONFIG_PCI
-
-#define CFG_PCI1_MEM_BASE      0x80000000
-#define CFG_PCI1_MEM_PHYS      CFG_PCI1_MEM_BASE
-#define CFG_PCI1_MEM_SIZE      0x20000000      /* 512M */
-#define CFG_PCI1_IO_BASE       0x00000000
-#define CFG_PCI1_IO_PHYS       0xe2000000
-#define CFG_PCI1_IO_SIZE       0x1000000       /* 16M */
-
-#define CFG_PCI2_MEM_BASE      0xA0000000
-#define CFG_PCI2_MEM_PHYS      CFG_PCI2_MEM_BASE
-#define CFG_PCI2_MEM_SIZE      0x20000000      /* 512M */
-#define CFG_PCI2_IO_BASE       0x00000000
-#define CFG_PCI2_IO_PHYS       0xe3000000
-#define CFG_PCI2_IO_SIZE       0x1000000       /* 16M */
+#define CONFIG_PCI
+
 #if defined(CONFIG_PCI)
 
-#define PCI_ALL_PCI1
-#if defined(PCI_64BIT)
-#undef PCI_ALL_PCI1
-#undef PCI_TWO_PCI1
-#undef PCI_ONE_PCI1
-#endif
+#define CONFIG_PCI_PNP                  /* do pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
+
+/* PCI1 host bridge */
+#define CFG_PCI1_MEM_BASE       0xc0000000
+#define CFG_PCI1_MEM_PHYS       CFG_PCI1_MEM_BASE
+#define CFG_PCI1_MEM_SIZE       0x20000000      /* 512M */
+#define CFG_PCI1_IO_BASE        0xe2000000
+#define CFG_PCI1_IO_PHYS        CFG_PCI1_IO_BASE
+#define CFG_PCI1_IO_SIZE        0x1000000       /* 16M */
 
-#define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP         /* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
+#define CONFIG_EEPRO100
 #undef CONFIG_TULIP
 
 #if !defined(CONFIG_PCI_PNP)
-       #define PCI_ENET0_IOADDR        0xFIXME
-       #define PCI_ENET0_MEMADDR       0xFIXME
-       #define PCI_IDSEL_NUMBER        0x0c    /* slot0->3(IDSEL)=12->15 */
+       #define PCI_ENET0_IOADDR        CFG_PCI1_IO_BASE
+       #define PCI_ENET0_MEMADDR       CFG_PCI1_MEM_BASE
+       #define PCI_IDSEL_NUMBER        0x1c    /* slot0 (IDSEL) = 28 */
 #endif
 
-#undef CONFIG_PCI_SCAN_SHOW                    /* show pci devices on startup */
-#define CFG_PCI_SUBSYS_VENDORID                0x1057  /* Motorola */
+#define CFG_PCI_SUBSYS_VENDORID                0x1957  /* Freescale */
 
 #endif /* CONFIG_PCI */
 
@@ -418,7 +407,7 @@ extern int tqm834x_num_flash_banks;
        HRCWH_PCI_HOST |\
        HRCWH_32_BIT_PCI |\
        HRCWH_PCI1_ARBITER_ENABLE |\
-       HRCWH_PCI2_ARBITER_ENABLE |\
+       HRCWH_PCI2_ARBITER_DISABLE |\
        HRCWH_CORE_ENABLE |\
        HRCWH_FROM_0X00000100 |\
        HRCWH_BOOTSEQ_DISABLE |\
@@ -483,17 +472,17 @@ extern int tqm834x_num_flash_banks;
        "netdev=eth0\0"                                                 \
        "hostname=tqm83xx\0"                                            \
        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
-               "nfsroot=$(serverip):$(rootpath)\0"                     \
+               "nfsroot=${serverip}:${rootpath}\0"                     \
        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
-       "addip=setenv bootargs $(bootargs) "                            \
-               "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"      \
-               ":$(hostname):$(netdev):off panic=1\0"                  \
-       "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
+       "addip=setenv bootargs ${bootargs} "                            \
+               "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
+               ":${hostname}:${netdev}:off panic=1\0"                  \
+       "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
        "flash_nfs=run nfsargs addip addtty;"                           \
-               "bootm $(kernel_addr)\0"                                \
+               "bootm ${kernel_addr}\0"                                \
        "flash_self=run ramargs addip addtty;"                          \
-               "bootm $(kernel_addr) $(ramdisk_addr)\0"                \
-       "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;"     \
+               "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
+       "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"     \
                "bootm\0"                                               \
        "rootpath=/opt/eldk/ppc_6xx\0"                                  \
        "bootfile=/tftpboot/tqm83xx/uImage\0"                           \