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Merge with git://www.denx.de/git/u-boot.git
[oweals/u-boot.git] / include / configs / TQM834x.h
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 727094b203f176cfb0e482d240c2491b91a858de..01472529d0465ae8a9ced74f785ad2f07126ef3f 100644 (file)
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -28,9 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define DEBUG
-#undef DEBUG
-
 /*
  * High Level Configuration Options
  */
@@ -41,7 +38,7 @@
 #define CONFIG_TQM834X         1       /* TQM834X board specific */
 
 /* IMMR Base Addres Register, use Freescale default: 0xff400000 */
-#define CFG_IMMRBAR            0xff400000
+#define CFG_IMMR               0xff400000
 
 /* System clock. Primary input clock when in PCI host mode */
 #define CONFIG_83XX_CLKIN      66666000        /* 66,666 MHz */
@@ -57,17 +54,6 @@
  */
 #define CFG_LCRR               (LCRR_DBYP | LCRR_CLKDIV_8)
 
-#define CFG_SCCR_INIT          (SCCR_DEFAULT & (~SCCR_CLK_MASK))
-#define CFG_SCCR_TSEC1CM       SCCR_TSEC1CM_1  /* TSEC1 clock setting */
-#define CFG_SCCR_TSEC2CM       SCCR_TSEC2CM_1  /* TSEC2 clock setting */
-#define CFG_SCCR_ENCCM         SCCR_ENCCM_3    /* ENC clock setting */
-#define CFG_SCCR_USBCM         SCCR_USBCM_3    /* USB clock setting */
-#define CFG_SCCR_VAL           ( CFG_SCCR_INIT         \
-                               | CFG_SCCR_TSEC1CM      \
-                               | CFG_SCCR_TSEC2CM      \
-                               | CFG_SCCR_ENCCM        \
-                               | CFG_SCCR_USBCM        )
-
 /* board pre init: do not call, nothing to do */
 #undef CONFIG_BOARD_EARLY_INIT_F
 
@@ -210,14 +196,15 @@ extern int tqm834x_num_flash_banks;
 #define CFG_BAUDRATE_TABLE  \
        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
 
-#define CFG_NS16550_COM1       (CFG_IMMRBAR + 0x4500)
-#define CFG_NS16550_COM2       (CFG_IMMRBAR + 0x4600)
+#define CFG_NS16550_COM1       (CFG_IMMR + 0x4500)
+#define CFG_NS16550_COM2       (CFG_IMMR + 0x4600)
 
 /*
  * I2C
  */
 #define CONFIG_HARD_I2C                                /* I2C with hardware support    */
 #undef CONFIG_SOFT_I2C                         /* I2C bit-banged               */
+#define CONFIG_FSL_I2C
 #define CFG_I2C_SPEED                  400000  /* I2C speed: 400KHz            */
 #define CFG_I2C_SLAVE                  0x7F    /* slave address                */
 #define CFG_I2C_OFFSET                 0x3000
@@ -248,9 +235,9 @@ extern int tqm834x_num_flash_banks;
 #define CONFIG_MII
 
 #define CFG_TSEC1_OFFSET       0x24000
-#define CFG_TSEC1              (CFG_IMMRBAR + CFG_TSEC1_OFFSET)
+#define CFG_TSEC1              (CFG_IMMR + CFG_TSEC1_OFFSET)
 #define CFG_TSEC2_OFFSET       0x25000
-#define CFG_TSEC2              (CFG_IMMRBAR + CFG_TSEC2_OFFSET)
+#define CFG_TSEC2              (CFG_IMMR + CFG_TSEC2_OFFSET)
 
 #if defined(CONFIG_TSEC_ENET)
 
@@ -258,14 +245,16 @@ extern int tqm834x_num_flash_banks;
 #define CONFIG_NET_MULTI
 #endif
 
-#define CONFIG_MPC83XX_TSEC1           1
-#define CONFIG_MPC83XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC83XX_TSEC2           1
-#define CONFIG_MPC83XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1           1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2           1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR                 2
 #define TSEC2_PHY_ADDR                 1
 #define TSEC1_PHYIDX                   0
 #define TSEC2_PHYIDX                   0
+#define TSEC1_FLAGS            TSEC_GIGABIT
+#define TSEC2_FLAGS            TSEC_GIGABIT
 
 /* Options are: TSEC[0-1] */
 #define CONFIG_ETHPRIME                        "TSEC0"
@@ -291,7 +280,6 @@ extern int tqm834x_num_flash_banks;
 #define CFG_PCI1_IO_PHYS        CFG_PCI1_IO_BASE
 #define CFG_PCI1_IO_SIZE        0x1000000       /* 16M */
 
-
 #undef CONFIG_EEPRO100
 #define CONFIG_EEPRO100
 #undef CONFIG_TULIP
@@ -326,38 +314,36 @@ extern int tqm834x_num_flash_banks;
 #define CONFIG_LOADS_ECHO              1       /* echo on for serial download */
 #define CFG_LOADS_BAUD_CHANGE          1       /* allow baudrate change */
 
-/* Common commands */
-#define CFG_CMD_TQM8349_COMMON CFG_CMD_DATE | CFG_CMD_I2C | CFG_CMD_DTT\
-                               | CFG_CMD_PING | CFG_CMD_EEPROM         \
-                               | CFG_CMD_MII | CFG_CMD_JFFS2
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
-#if defined(CFG_RAMBOOT)
 
-#if defined(CONFIG_PCI)
-#define  CONFIG_COMMANDS       ((CONFIG_CMD_DFL | CFG_CMD_PCI  \
-                               | CFG_CMD_TQM8349_COMMON)       \
-                               &                               \
-                               ~(CFG_CMD_ENV | CFG_CMD_LOADS))
-#else
-#define  CONFIG_COMMANDS       ((CONFIG_CMD_DFL                \
-                               | CFG_CMD_TQM8349_COMMON)       \
-                               &                               \
-                               ~(CFG_CMD_ENV | CFG_CMD_LOADS))
-#endif
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
 
-#else /* CFG_RAMBOOT */
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
 
 #if defined(CONFIG_PCI)
-#define  CONFIG_COMMANDS       (CONFIG_CMD_DFL | CFG_CMD_PCI   \
-                               | CFG_CMD_TQM8349_COMMON)
-#else
-#define  CONFIG_COMMANDS       (CONFIG_CMD_DFL                 \
-                               | CFG_CMD_TQM8349_COMMON)
+    #define CONFIG_CMD_PCI
 #endif
 
-#endif /* CFG_RAMBOOT */
-
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+    #undef CONFIG_CMD_ENV
+    #undef CONFIG_CMD_LOADS
+#endif
 
 /*
  * Miscellaneous configurable options
@@ -372,7 +358,7 @@ extern int tqm834x_num_flash_banks;
 #define        CFG_PROMPT_HUSH_PS2     "> "
 #endif
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
        #define CFG_CBSIZE      1024            /* Console I/O Buffer Size */
 #else
        #define CFG_CBSIZE      256             /* Console I/O Buffer Size */
@@ -397,7 +383,7 @@ extern int tqm834x_num_flash_banks;
  */
 #define CFG_DCACHE_SIZE                32768
 #define CFG_CACHELINE_SIZE     32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
 #endif
 
@@ -473,8 +459,8 @@ extern int tqm834x_num_flash_banks;
 #endif
 
 /* IMMRBAR */
-#define CFG_IBAT6L     (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_IBAT6U     (CFG_IMMRBAR | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CFG_IBAT6L     (CFG_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT6U     (CFG_IMMR | BATU_BL_1M | BATU_VS | BATU_VP)
 
 /* FLASH */
 #define CFG_IBAT7L     (CFG_FLASH_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -505,7 +491,7 @@ extern int tqm834x_num_flash_banks;
 #define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH */
 #define BOOTFLAG_WARM          0x02    /* Software reboot */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed of kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
@@ -515,6 +501,7 @@ extern int tqm834x_num_flash_banks;
  */
 
 #if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
 #define CONFIG_ETHADDR         D2:DA:5E:44:BC:29
 #define CONFIG_HAS_ETH1
 #define CONFIG_ETH1ADDR                1E:F3:40:21:92:53
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