* (easy to change)
*/
-#define CONFIG_MPC5XXX 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
#define CONFIG_TOP5200 1 /* ... on TOP5200 board - we need this for FEC.C */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
-#ifdef CONFIG_EVAL5200 /* PCI is supported with Evaluation board only */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
/*
* PCI Mapping:
* 0x40000000 - 0x4fffffff - PCI Memory
# define CONFIG_PCI 1
# define CONFIG_PCI_PNP 1
# define CONFIG_PCI_SCAN_SHOW 1
+# define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
# define CONFIG_PCI_MEM_BUS 0x40000000
# define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
# define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
# define CONFIG_PCI_IO_SIZE 0x01000000
-# define ADD_PCI_CMD CFG_CMD_PCI
+#endif
+
+/* USB */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
-#else /* no Evaluation board */
+# define CONFIG_USB_OHCI
+# define CONFIG_USB_CLOCK 0x0001bbbb
+# if defined (CONFIG_EVAL5200)
+# define CONFIG_USB_CONFIG 0x00005100
+# else
+# define CONFIG_USB_CONFIG 0x00001000
+# endif
+# define CONFIG_DOS_PARTITION
+# define CONFIG_USB_STORAGE
-# define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
+#endif
+/* IDE */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
+# define CONFIG_DOS_PARTITION
#endif
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- ADD_PCI_CMD | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_BEDBUG \
- )
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
/*
- * low boot
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_REGINFO
+
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_PCI
+#endif
+
+
+/*
+ * MUST be low boot - HIGHBOOT is not supported anymore
*/
#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CFG_LOWBOOT 1
# define CFG_LOWBOOT16 1
+#else
+# error "TEXT_BASE must be 0xff000000"
#endif
/*
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_PREBOOT "echo;" \
- "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
"echo"
#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$(serverip):$(rootpath)\0" \
+ "nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip=setenv bootargs $(bootargs) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
- ":$(hostname):$(netdev):off panic=1\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
- "bootm $(kernel_addr)\0" \
+ "bootm ${kernel_addr}\0" \
"flash_self=run ramargs addip;" \
- "bootm $(kernel_addr) $(ramdisk_addr)\0" \
- "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_82xx\0" \
"bootfile=/tftpboot/MPC5200/uImage\0" \
""
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
#define CONFIG_MISC_INIT_R
#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1
+#define CONFIG_SOFT_I2C 1 /* I2C with softwate support */
#if defined (CONFIG_SOFT_I2C)
# define SDA0 0x40
# define I2C_TRISTATE {DDR0&=~SDA0;}
# define CFG_I2C_SPEED 100000
# define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_FACT_ADDR 0x57
#endif
#if defined (CONFIG_HARD_I2C)
# define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */
# define CFG_I2C_SPEED 100000 /* 100 kHz */
# define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_EEPROM_ADDR 0x54
+#define CFG_I2C_FACT_ADDR 0x54
#endif
/*
#define CFG_ENV_IS_IN_EEPROM 1 /* turn on EEPROM env feature */
#define CFG_ENV_OFFSET 0x1000
#define CFG_ENV_SIZE 0x0700
-#define CFG_I2C_EEPROM_ADDR 0x57
/*
* VPD settings
*/
#define CFG_FACT_OFFSET 0x1800
#define CFG_FACT_SIZE 0x0800
-#define CFG_I2C_FACT_ADDR 0x57
/*
* Memory map
/*
* Ethernet configuration
*/
-#define CONFIG_MPC5XXX_FEC 1
+#define CONFIG_MPC5xxx_FEC 1
#define CONFIG_FEC_10MBIT 1 /* Workaround for FEC 100Mbit problem */
#define CONFIG_PHY_ADDR 0x1f
#define CONFIG_PHY_TYPE 0x79c874
* PCI disabled
* Ethernet 100 with MD
*/
-#define CFG_GPS_PORT_CONFIG 0x00058444
+#define CFG_GPS_PORT_CONFIG 0x00058044
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
#define CFG_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
-#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_LOAD_ADDR 0x200000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
-#define CONFIG_RTC_MPC5200 1 /* use 5200 RTC */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+
+#ifdef CONFIG_EVAL5200 /* M48T08 is available with the Evaluation board only */
+ #define CONFIG_RTC_MK48T59 1 /* use M48T08 on EVAL5200 */
+ #define RTC(reg) (0xf0010000+reg)
+ /* setup CS2 for M48T08. Must MAP 64kB */
+ #define CFG_CS2_START RTC(0)
+ #define CFG_CS2_SIZE 0x10000
+ /* setup CS2 configuration register: */
+ /* WaitP = 0, WaitX = 4, MX=0, AL=1, AA=1, CE=1 */
+ /* AS=2, DS=0, Bank=0, WTyp=0, WS=0, RS=0, WO=0, RO=0 */
+ #define CFG_CS2_CFG 0x00047800
+#else
+ #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
+#endif
/*
* Various low-level settings
#define CFG_RESET_ADDRESS 0x7f000000
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CONFIG_IDE_RESET 1
+#define CONFIG_IDE_PREINIT
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (0x0060)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x005c)
+
+/* Interval between registers */
+#define CFG_ATA_STRIDE 4
+
#endif /* __CONFIG_H */
projects / oweals / u-boot.git / blobdiff