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Merge branch 'master' of git://git.denx.de/u-boot-sunxi
[oweals/u-boot.git] / include / configs / T208xQDS.h
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 2f381e7b49ea88445f54110bf2602612f0118024..a32ddeed1d269c55c76f456ca84d48eea4c02553 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -11,27 +11,17 @@
 #ifndef __T208xQDS_H
 #define __T208xQDS_H
 
-#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
-#define CONFIG_MMC
-#define CONFIG_SPI_FLASH
 #define CONFIG_USB_EHCI
-#if defined(CONFIG_PPC_T2080)
-#define CONFIG_T2080QDS
+#if defined(CONFIG_ARCH_T2080)
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_SYS_SRIO                /* Enable Serial RapidIO Support */
 #define CONFIG_SRIO1           /* SRIO port 1 */
 #define CONFIG_SRIO2           /* SRIO port 2 */
-#elif defined(CONFIG_PPC_T2081)
-#define CONFIG_T2081QDS
+#elif defined(CONFIG_ARCH_T2081)
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_PHYS_64BIT
-#define CONFIG_BOOKE
-#define CONFIG_E500            /* BOOKE e500 family */
-#define CONFIG_E500MC          /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
 #define CONFIG_MP              /* support multiple processors */
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -42,30 +32,14 @@
 #endif
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC     CONFIG_NUM_DDR_CONTROLLERS
-#define CONFIG_FSL_IFC         /* Enable IFC Support */
-#define CONFIG_FSL_CAAM                /* Enable SEC/CAAM */
-#define CONFIG_FSL_LAW         /* Use common FSL init code */
+#define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
 #define CONFIG_ENV_OVERWRITE
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg
-#if defined(CONFIG_PPC_T2080)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_rcw.cfg
-#elif defined(CONFIG_PPC_T2081)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg
-#endif
 
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE           0x00201000
 #define CONFIG_SPL_TEXT_BASE           0xFFFD8000
 #define CONFIG_SPL_PAD_TO              0x40000
@@ -76,23 +50,24 @@
 #define CONFIG_SPL_SKIP_RELOCATE
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#define CONFIG_SYS_NO_FLASH
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    (256 << 10)
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#if defined(CONFIG_ARCH_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_nand_rcw.cfg
+#elif defined(CONFIG_ARCH_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_nand_rcw.cfg
+#endif
 #define CONFIG_SPL_NAND_BOOT
 #endif
 
 #ifdef CONFIG_SPIFLASH
 #define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_MINIMAL
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x00200000)
@@ -102,12 +77,16 @@
 #ifndef CONFIG_SPL_BUILD
 #define        CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
+#if defined(CONFIG_ARCH_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_spi_rcw.cfg
+#elif defined(CONFIG_ARCH_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_spi_rcw.cfg
+#endif
 #define CONFIG_SPL_SPI_BOOT
 #endif
 
 #ifdef CONFIG_SDCARD
 #define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
-#define CONFIG_SPL_MMC_SUPPORT
 #define CONFIG_SPL_MMC_MINIMAL
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x00200000)
@@ -117,6 +96,11 @@
 #ifndef CONFIG_SPL_BUILD
 #define        CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
+#if defined(CONFIG_ARCH_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_sd_rcw.cfg
+#elif defined(CONFIG_ARCH_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_sd_rcw.cfg
+#endif
 #define CONFIG_SPL_MMC_BOOT
 #endif
 
@@ -129,7 +113,6 @@
 #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
                (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
 #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#define CONFIG_SYS_NO_FLASH
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
@@ -151,7 +134,7 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
 
-#ifndef CONFIG_SYS_NO_FLASH
+#ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
@@ -233,8 +216,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
-#undef CONFIG_FSL_DDR_INTERACTIVE
+#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
@@ -293,6 +275,10 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_LBMAP_SHIFT              0
 #define QIXIS_LBMAP_DFLTBANK           0x00
 #define QIXIS_LBMAP_ALTBANK            0x04
+#define QIXIS_LBMAP_NAND               0x09
+#define QIXIS_LBMAP_SD                 0x00
+#define QIXIS_RCW_SRC_NAND             0x104
+#define QIXIS_RCW_SRC_SD               0x040
 #define QIXIS_RST_CTL_RESET            0x83
 #define QIXIS_RST_FORCE_MEM            0x1
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE   0x20
@@ -357,7 +343,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 
@@ -432,7 +417,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_INIT_RAM_LOCK
 #define CONFIG_SYS_INIT_RAM_ADDR       0xfdd00000 /* Initial L1 address */
 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH     0xf
-#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW      0xfe0ec000
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW      0xfe03c000
 /* The assembler doesn't like typecast */
 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
                        ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
@@ -448,7 +433,6 @@ unsigned long get_board_ddr_clk(void);
  * Serial Port
  */
 #define CONFIG_CONS_INDEX              1
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         (get_bus_freq(0)/2)
@@ -459,19 +443,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
 #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
 
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE     /* enable fit_format_{error,warning}() */
-
 /*
  * I2C
  */
@@ -494,6 +465,23 @@ unsigned long get_board_ddr_clk(void);
 #define I2C_MUX_PCA_ADDR_SEC2  0x76 /* I2C bus multiplexer,secondary 2 */
 #define I2C_MUX_CH_DEFAULT     0x8
 
+#define I2C_MUX_CH_VOL_MONITOR 0xa
+
+/* Voltage monitor on channel 2*/
+#define I2C_VOL_MONITOR_ADDR           0x40
+#define I2C_VOL_MONITOR_BUS_V_OFFSET   0x2
+#define I2C_VOL_MONITOR_BUS_V_OVF      0x1
+#define I2C_VOL_MONITOR_BUS_V_SHIFT    3
+
+#define CONFIG_VID_FLS_ENV             "t208xqds_vdd_mv"
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_VID
+#endif
+#define CONFIG_VOL_MONITOR_IR36021_SET
+#define CONFIG_VOL_MONITOR_IR36021_READ
+/* The lowest and highest voltage allowed for T208xQDS */
+#define VDD_MV_MIN                     819
+#define VDD_MV_MAX                     1212
 
 /*
  * RapidIO
@@ -537,14 +525,9 @@ unsigned long get_board_ddr_clk(void);
  * eSPI - Enhanced SPI
  */
 #ifdef CONFIG_SPI_FLASH
-#define CONFIG_FSL_ESPI
-#define CONFIG_SPI_FLASH_STMICRO
 #ifndef CONFIG_SPL_BUILD
-#define CONFIG_SPI_FLASH_SST
-#define CONFIG_SPI_FLASH_EON
 #endif
 
-#define CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH_BAR
 #define CONFIG_SF_DEFAULT_SPEED         10000000
 #define CONFIG_SF_DEFAULT_MODE   0
@@ -554,11 +537,11 @@ unsigned long get_board_ddr_clk(void);
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
-#define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
-#define CONFIG_PCIE3           /* PCIE controler 3 */
-#define CONFIG_PCIE4           /* PCIE controler 4 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
+#define CONFIG_PCIE3           /* PCIE controller 3 */
+#define CONFIG_PCIE4           /* PCIE controller 4 */
+#define CONFIG_FSL_PCIE_RESET
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
@@ -603,11 +586,7 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_FSL_PCIE_RESET     /* need PCIe reset errata */
-#define CONFIG_NET_MULTI
-#define CONFIG_E1000
-#define CONFIG_PCI_PNP         /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
 #endif
 
 /* Qman/Bman */
@@ -617,10 +596,26 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_BMAN_MEM_BASE       0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS       0xff4000000ull
 #define CONFIG_SYS_BMAN_MEM_SIZE       0x02000000
+#define CONFIG_SYS_BMAN_SP_CENA_SIZE    0x4000
+#define CONFIG_SYS_BMAN_SP_CINH_SIZE    0x1000
+#define CONFIG_SYS_BMAN_CENA_BASE       CONFIG_SYS_BMAN_MEM_BASE
+#define CONFIG_SYS_BMAN_CENA_SIZE       (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_CINH_BASE       (CONFIG_SYS_BMAN_MEM_BASE + \
+                                       CONFIG_SYS_BMAN_CENA_SIZE)
+#define CONFIG_SYS_BMAN_CINH_SIZE       (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_SWP_ISDR_REG    0xE08
 #define CONFIG_SYS_QMAN_NUM_PORTALS    18
 #define CONFIG_SYS_QMAN_MEM_BASE       0xf6000000
 #define CONFIG_SYS_QMAN_MEM_PHYS       0xff6000000ull
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
+#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
+#define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
+#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
+#define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
+                                       CONFIG_SYS_QMAN_CENA_SIZE)
+#define CONFIG_SYS_QMAN_CINH_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_SWP_ISDR_REG   0xE08
 
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
@@ -702,19 +697,14 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SATA2_FLAGS         FLAGS_DMA
 #define CONFIG_LBA48
 #define CONFIG_CMD_SATA
-#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_EXT2
 #endif
 
 /*
  * USB
  */
 #ifdef CONFIG_USB_EHCI
-#define CONFIG_CMD_USB
-#define CONFIG_USB_STORAGE
 #define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_CMD_EXT2
 #define CONFIG_HAS_FSL_DR_USB
 #endif
 
@@ -722,22 +712,18 @@ unsigned long get_board_ddr_clk(void);
  * SDHC
  */
 #ifdef CONFIG_MMC
-#define CONFIG_CMD_MMC
 #define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#define CONFIG_GENERIC_MMC
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_DOS_PARTITION
+#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #endif
 
-
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#ifndef CONFIG_SYS_NO_FLASH
+#ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITIONS
 #define CONFIG_CMD_MTDPARTS
@@ -759,23 +745,12 @@ unsigned long get_board_ddr_clk(void);
 /*
  * Command line configuration.
  */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ELF
 #define CONFIG_CMD_ERRATA
-#define CONFIG_CMD_GREPENV
 #define CONFIG_CMD_IRQ
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
 #define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_BDI
 
 #ifdef CONFIG_PCI
 #define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
 #endif
 
 /* Hash command with SHA acceleration supported in hardware */
@@ -822,8 +797,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
-#define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 #define __USB_PHY_TYPE         utmi
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
@@ -843,7 +816,7 @@ unsigned long get_board_ddr_clk(void);
        "consoledev=ttyS0\0"                                    \
        "ramdiskaddr=2000000\0"                                 \
        "ramdiskfile=t2080qds/ramdisk.uboot\0"                  \
-       "fdtaddr=c00000\0"                                      \
+       "fdtaddr=1e00000\0"                                     \
        "fdtfile=t2080qds/t2080qds.dtb\0"                       \
        "bdev=sda3\0"
 
@@ -913,10 +886,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_BOOTCOMMAND             CONFIG_LINUX
 
-#ifdef CONFIG_SECURE_BOOT
 #include <asm/fsl_secure_boot.h>
-#define CONFIG_CMD_BLOB
-#undef CONFIG_CMD_USB
-#endif
 
 #endif /* __T208xQDS_H */
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